WM8903 Datasheet, PDF (77/178 Pages) Wolfson Microelectronics plc – Ultra Low Power CODEC for Portable Audio Applications

Production Data
WM8903
REFERENCE VOLTAGES AND MASTER BIAS
This section describes the analogue reference voltage and bias current controls. It also describes the
VMID soft-start circuit for pop-free start-up and shut-down. Note that, under the recommended usage
conditions of the WM8903, these features will be configured by running the default Start-Up and Shut-
Down sequences as described in the “Control Write Sequencer” section. In these cases, the user
does not need to set these register fields directly.
The analogue circuits in the WM8903 require a mid-rail analogue reference voltage, VMID. This
reference is generated from AVDD via a programmable resistor chain. Together with the external
VMID decoupling capacitor, the programmable resistor chain results in a slow, normal or fast
charging characteristic on VMID. This is controlled by VMID_RES [1:0], and can be used to optimise
the reference for normal operation, low power standby or for fast start-up as described in Table 49.
For normal operation, the VMID_RES field should be set to 01.
The analogue circuits in the WM8903 require a bias current. The normal bias current is enabled by
setting BIAS_ENA. Note that the normal bias current source requires VMID to be enabled also. The
normal bias current can also be controlled using the ISEL field as described in Table 49. This can be
used to reduce power consumption, but may have a detrimental impact on audio performance in
some usage modes. The default setting is recommended.
Note that the DAC and Output PGA bias circuits may also be adjusted in order to reduce power
consumption. For details, see “Digital-to-Analogue Converter (DAC)“ or “Output Signal Path”.
An alternate bias current source (Start-Up Bias) is provided for pop-free start-up; this is selected
using POBCTRL (see Table 50). Note that the default setting of POBCTRL selects the Start-Up Bias.
The normal bias is only selected when POBCTRL is set to logic 0.
REGISTER BIT
ADDRESS
LABEL
R4 (04h)
3:2 ISEL [1:0]
Bias Control
0
DEFAULT
10
0
BIAS_ENA
0
R5 (05h)
2:1 VMID_RES [1:0]
00
VMID
Control 0
Table 49 Reference Voltages and Master Bias Enable
DESCRIPTION
Master Bias control
00 = Normal bias x 0.5
01 = Normal bias x 0.75
10 = Normal bias
11 = Normal bias x 1.5
Enables the Normal bias current
generator (for all analogue functions)
0 = Disabled
1 = Enabled
VMID Divider Enable and Select
00 = VMID disabled (for OFF mode)
01 = 2 x 50k divider (for normal
operation)
10 = 2 x 250k divider (for low power
standby)
11 = 2 x 5k divider (for fast start-up)
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PD, Rev 4.5, June 2012
77