WM8903 Datasheet, PDF (112/178 Pages) Wolfson Microelectronics plc – Ultra Low Power CODEC for Portable Audio Applications

WM8903
INTERRUPTS
Production Data
The Interrupt Controller has multiple inputs. These include the GPIO input pins and the MICBIAS
current detection circuits. Any combination of these inputs can be used to trigger an Interrupt (IRQ)
event.
There is an Interrupt Status field associated with each of the IRQ inputs. These are contained in the
Interrupt Status Register (R121), as described in Table 73. The status of the IRQ inputs can be read
from this register at any time, or else in response to the Interrupt Output being signalled via a GPIO
pin.
The Interrupt Output represents the logical ‘OR’ of all the unmasked IRQ inputs. The bits within the
Interrupt Status register (R121) are latching fields and, once they are set, they are not reset until the
Status Register is read. Accordingly, the Interrupt Output is not reset until each of the unmasked IRQ
inputs has been read. Note that, if the condition that caused the IRQ input to be asserted is still valid,
then the Interrupt Output will remain set even after the Status register has been read.
Each of the IRQ inputs can be individually masked or enabled as an input to the Interrupt function,
using the bits contained in the Interrupt Status Mask register (R122). Note that the interrupt status
fields remain valid, even when masked, but the masked bits will not cause the Interrupt Output to be
asserted.
When a GPIO input is used as Interrupt event, the polarity can be set using GP_IP_CFG as described
in Table 72. The polarity of the MICBIAS detection functions can be set using MICDET_INV and
MICSHRT_INV as described in Table 73; this allows the IRQ event to be used to indicate either the
removal or insertion of a microphone accessory. The polarity of the FLL Lock indication can be set
using FLL_LOCK_INV; this allows the IRQ event to be used to indicate either the FLL Lock or the FLL
Not-Locked status.
By default, the Interrupt Output is Active High. The polarity can be inverted using IRQ_POL.
The Interrupt Output may be configured the INTERRUPT/GPIO4 pin or on the GPIO1/DMIC_LR,
GPIO2/DMIC_DAT, GPIO3/ADDR or BCLK/GPIO5 pins. Interrupt Output is the default function on the
INTERRUPT pin (GP4_FN = 2h), but the INTERRUPT pin can also be used to support other
functions. See “General Purpose Input/Output (GPIO)” for details of how to configure GPIO pins for
Interrupt (IRQ) output.
The WM8903 Interrupt Controller circuit is illustrated in Figure 54. The associated control fields are
described in Table 73.
MIC_SHORT_IRQ
MIC_DETECT_IRQ
FLL_LOCK_IRQ
MICSHRT_INV
MICDET_INV
FLL_LOCK_INV
WSEQ_BUSY_IRQ
GPIO5_IRQ
GPIO4_IRQ
GPIO3_IRQ
GPIO2_IRQ
GPIO1_IRQ
Status
Register
Latches
Read only;
cleared on
register
read
MICSHRT_EINT
IM_MICSHRT_EINT
MICDET_EINT
IM_MICDET_EINT
FLL_LOCK_EINT
IM_FLL_LOCK_EINT
WSEQ_BUSY_EINT
IM_WSEQ_BUSY_EINT
GP5_EINT
IM_GP5_EINT
GP4_EINT
IM_GP4_EINT
GP3_EINT
IM_GP3_EINT
GP2_EINT
IM_GP2_EINT
GP1_EINT
IM_GP1_EINT
IRQ_POL
INTERRUPT
Figure 56 Interrupt Controller
w
PD, Rev 4.5, June 2012
112