WM8983_06 Datasheet, PDF (71/123 Pages) Wolfson Microelectronics plc – Mobile Multimedia CODEC with 1W Speaker Driver

Production Data
WM8983
REGISTER
ADDRESS
R54
LOUT2
Volume
control
BIT
LABEL
7
LOUT2ZC
6
LOUT2MUTE
5:0 LOUT2VOL
R55
ROUT2
Volume
control
8
SPKVU
7
ROUT2ZC
6
ROUT2MUTE
5:0 ROUT2VOL
8
SPKVU
Table 42 OUT2 Volume Control
DEFAULT
DESCRIPTION
0
0
111001
Not latched
0
0
111001
Not latched
LOUT2 volume zero cross enable:
1 = Change gain on zero cross only
0 = Change gain immediately
Left output mute:
0 = Normal operation
1 = Mute
Left output volume:
000000 = -57dB
000001 = -56dB
...
111001 = 0dB
...
111111 = +6dB
LOUT2 and ROUT2 volumes do not
update until a 1 is written to
OUT2VU (in reg 54 or 55)
ROUT2 volume zero cross enable:
1 = Change gain on zero cross only
0 = Change gain immediately
Right output mute:
0 = Normal operation
1 = Mute
Right output volume:
000000 = -57dB
000001 = -56dB
...
111001 = 0dB
...
111111 = +6dB
LOUT2 and ROUT2 volumes do not
update until a 1 is written to
OUT2VU (in reg 54 or 55)
The signal output on LOUT2/ROUT2 comes from the Left/Right Mixer circuits and can be any
combination of the DAC output, the Bypass path (output of the input boost stage) and the AUX input.
The LOUT2/ROUT2 volume is controlled by the LOUT2VOL/ ROUT2VOL register bits. Gains over
0dB may cause clipping if the signal is large. The LOUT2MUTE/ ROUT2MUTE register bits cause
the speaker outputs to be muted (the output DC level is driven out). The output pins remain at the
same DC level (DCOP), so that no click noise is produced when muting or un-muting
The speaker output stages also have a selectable gain boost of 1.5x (3.52dB). When this boost is
enabled the output DC level is also level shifted (from AVDD1/2 to 1.5xAVDD1/2) to prevent the
signal from clipping. A dedicated amplifier BUFDCOP, as shown in Figure 34 , is used to perform
the DC level shift operation. This buffer must be enabled using the BUFDCOPEN register bit for this
operating mode. It should also be noted that if AVDD2 is not equal to or greater than 1.5xAVDD1
this boost mode may result in signals clipping. Table 44 summarises the effect of the SPKBOOST
control bits.
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PD Rev 4.0 November 2006
71