WM8580 Datasheet, PDF (66/92 Pages) Wolfson Microelectronics plc – Multichannel CODEC with S/PDIF Transceiver

WM8580
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REGISTER ADDRESS BIT
R50
0
PWRDN 1
32h
LABEL
PWDN
1
ADCPD
4:2 DACPD[2:0]
6 ALLDACPD
R51
PWRDN 2
33h
0
OSCPD
1
PLLAPD
2
PLLBPD
3
SPDIFPD
4 SPDIFTXD
5 SPDIFRXD
Table 67 Powerdown Registers
DEFAULT
0
1
111
1
0
1
1
1
1
1
DESCRIPTION
Master powerdown (overrides all
powerdown registers)
0 = All digital circuits running,
outputs are active
1 = All digital circuits in power
down mode, outputs muted
ADC powerdown
0 = ADC enabled
1 = ADC disabled
DAC powerdowns
0 = DAC enabled
1 = DAC disabled
DACPD[0] = DAC1
DACPD[1] = DAC2
DACPD[2] = DAC3
Overrides DACPD[3:0]
0 = DACs under control of
DACPD[3:0]
1= All DACs are disabled.
OSC output powerdown
0 = OSC output enabled
1 = OSC output disabled
A CMOS input can be applied to
the OSC input when powered
down.
0 = PLLA enabled
1 = PLLA disabled
0 = PLLB enabled
1 = PLLB disabled
S/PDIF Clock Recovery
PowerDown
0 = S/PDIF enabled
1 = S/PDIF disabled
S/PDIF Transmitter powerdown
0 = S/PDIF Transmitter enabled
1 = S/PDIF Transmitter disabled
S/PDIF Receiver powerdown
0 = S/PDIF Receiver enabled
1 = S/PDIF Receiver disabled
w
PP Rev 1.0 March 2006
66