WM8326 Datasheet, PDF (246/255 Pages) Wolfson Microelectronics plc – Processor Power Management Subsystem

WM8326
REGISTER BIT
ADDRESS
LABEL
3:1 SYSOK_THR
[2:0]
Register 781Fh GPIO6 OTP Control
DEFAULT
DESCRIPTION
Production Data
REFER TO
8 = DC-DC1 DVS Done
9 = DC-DC2 DVS Done
10 = External Power Enable1
11 = External Power Enable2
12 = System Supply Good (SYSOK)
13 = Converter Power Good (PWR_GOOD)
14 = External Power Clock (2MHz)
15 = Auxiliary Reset
101 SYSOK threshold (rising PVDD)
This is the rising PVDD voltage at which SYSOK will be
asserted
000 = 2.8V
001 = 2.9V
…
111 = 3.5V
Note that the SYSOK hysteresis margin is added to
these threshold levels.
REGISTER
ADDRESS
R30759
(7827h) ICE
CHECK
DATA
BIT
LABEL
15:0 ICE_VALID_D
ATA [15:0]
Register 7827h ICE CHECK DATA
DEFAULT
DESCRIPTION
0000_0000 This field is checked in development mode when an
_0000_000 ‘ON’ transition is requested. A value of A596h is
0
required to confirm valid data.
REFER TO
w
PD, June 2012, Rev 4.0
246