74HC595 Datasheet, PDF (1/8 Pages) NXP Semiconductors – 8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

74HC595
8-Bit Shift Registers W ith Latched 3-State Output
GENERAL DESCRIPTION
74HC595 is fabricated with high-speed silicon
gate CMOS technology. It contains an 8-bit
serial-in, serial or parallel-out shift register and an
8-bit D-type storage register with parallel 3-state
outputs. The shift and storage register have
independent clock inputs. Both the shift register
clock (SRCK) and storage register clock (RCK)
are positive-edge triggered.
The shift register has a direct overriding clear
input (SRCL), serial data input (SER), and serial
outputs for cascading. When the output-enable
(OE) input is high, the outputs are in the
high-impedance state. If both clocks are
connected together, the shift register always is
one clock pulse ahead of the storage register.
FEATURES
• 8-bit serial-in, parallel-out shift register with storage
• Shift register has direct clear
• 8-bit D-type storage register with parallel 3-state outputs
• Two independent clocks for shift and storage register
• Wide operating power supply voltage 2-6V
• Low input current < 1µA
• Low power consumption, Max. 80µA (74HC595)
• Output driving capacity ± 6 mA at 5V
• Typical propagation delay 13nS
LOGIC DIAGRAM
13
OE
12
RCK
11
SRCK
14
SER
10
SRCL
Q₁
Q₂
Q₃
Q₄
Q₅
Q₆
Q₇
Q₈
15
1
2
3
4
5
6
7
3R
C3
3S
3R
C3
3S
3R
C3
3S
3R
C3
3S
3R
C3
3S
3R
C3
3S
3R
C3
3S
3R
C3
3S
1D
C1
R
2S
2R
C2
R
2S
2R
C2
R
2S
2R
C2
R
2S
2R
C2
R
2S
2R
C2
R
2S
2R
C2
R
2S
2R
C2
R
9 _Q8’
1