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W536030T Datasheet, PDF (8/16 Pages) Winbond – VOICE/MELODY/LCD CONTROLLER
W536030T/060T/090T/120T
PAD Description, continued
SYMBOL
COM0−COM15
I/O
FUNCTION
LCD common signal output pads either 1/32 duty or 1/16 duty. The LCD
O frame rate is controlled by LCDM1 register, and default value LCDM1 =
0111b with 64Hz frame rate.
COM16−COM23
LCD common signal output pads while 1/32 duty is active. The LCD
O frame rate is controlled by LCDM1 register, and default value LCDM1 =
0111b with 64Hz frame rate.
COM24/PORTP.0
LCD common signal output pads, or shared as general output by

O/O register LCDM3.2 when in 1/16 duty mode. Default function is common
COM27/PORTP.3
function.
COM28/PORTO.0
LCD common signal output pads, or shared as general input by register

O/I LCDM3.2 when in 1/16 duty mode. Default function is common function
COM31/PORTO.3
and PM5.2 = 0 to inhibit LCD waveform abnormal.
DH1, DH2 (6)
Connection terminal for voltage double capacitor with 0.1uF. The DH2
O connects to capacitor positive node and DH1 negative node if polar
capacitor is used.
V3 ~ V6 (6)
O
LCD COM/SEG output driving voltage. Need an external 0.1uF
capacitor to every pad terminal.
V2 (6)
Voltage regulator output pad. An external capacitor is a must. Output
level can be controlled from 0~Fh by LCDM4 register. If internal pump
is enabled (LCDM3.3 = 0 and default value), LCD operating voltage
I/O
(VLCD) will be 4*V2 or 5*V2 depending on 1/4 bias or 1/5 bias. A
limitation should be noted that VLCD must be higher than (VDD -0.5v) to
avoid chip leakage current. While external reference voltage is selected
(LCDM3.3 = 1), V2 pad input voltage can not be over 1.5 Volt to inhibit
chip damage.
VSSP
I Power ground for PWM or DAC playing output.
VSSA (7)
I Power ground. (For w536090/120T only)
VSS
I Power ground
VDDP
I Power source for PWM or DAC playing output.
VDDA (7)
I Power source. (For w536090/120T only)
VDD
I Power source.
Notes:
(4). RD1~3 are shared as CLK/DATA/ADDR to interface with W55XXX @W536030T/060T
(5). @W536120T only
(6). 0.1uF is default value, and capacitor value should be larger than 0.1uF if LCD dot size over 0.5mm*0.5mm.
(7). External application circuit should connect together, please refer to APPLICATION CIRCUIT. To sure chip operation
properly, please bond all VDDP, VDDA, VDD, VSSP, VSS and VSSA pads and connect VSSP, VSS from chip outside PCB circuit.
VSSA and VDDA are for W536090/120T only
(8). When working at NMOS open drain mode, external pull high voltage can't higher than VDD to avoid leakage current.
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