W26L010A Datasheet, PDF (8/10 Pages) Winbond – 64K X 16 High Speed CMOS Static RAM

W26L010A
Timing Waveforms, continued
Write Cycle 2
(OE = VIL Fixed)
Address
CS
UB/LB
WE
D _OUT
DIN
TWC
TCW
T_WR
TBW
TAW
TWP
TAS
TOH
TWHZ (1, 4)
TOW
(2)
(3)
TDW
TDH
Notes:
1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied.
2. The data output from DOUT are the same as the data written to DIN during the write cycle.
3. DOUT provides the read data for the next address.
4. Transition is measured ±500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested.
ORDERING INFORMATION
PART NO.
W26L010AJ-10
W26L010AJ-12
W26L010AT-10
W26L010AT-12
ACCESS
TIME
(nS)
10
12
10
12
OPERATING
CURRENT
MAX. (mA)
160
140
160
140
STANDBY
CURRENT
MAX. (mA)
10
10
10
10
PACKAGE
44-pin 400 mil SOJ
44-pin 400 mil SOJ
44-pin TSOP
44-pin TSOP
Notes:
1. Winbond reserves the right to make changes to its products without prior notice.
2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in
applications where personal injury might occur as a consequence of product failure.
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