W25X10 Datasheet, PDF (7/45 Pages) Winbond – 1M-BIT, 2M-BIT, 4M-BIT AND 8M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI

W25X10, W25X20, W25X40, W25X80
7.1 Package Types
At the time this datasheet was published not all package types had been finalized. Contact Winbond
to confirm availability of these packages before designing to this specification. The W25X10, W25X20
and W25X40 are offered in an 8-pin plastic 150-mil width SOIC (package code SN) as shown in figure
1a. The W25X40 and W25X80 is offered in an 8-pin plastic 208-mil width SOIC (package code SS) as
shown in figure 1b. All parts will be offered in 6x5-mm WSON (package code ZP) and 300-mil DIP
(package code DA). Package diagrams and dimensions are illustrated at the end of this datasheet.
7.2 Chip Select (/CS)
The SPI Chip Select (/CS) pin enables and disables device operation. When /CS is high the device is
deselected and the Serial Data Output (DO) pin is at high impedance. When deselected, the devices
power consumption will be at standby levels unless an internal erase, program or status register cycle
is in progress. When /CS is brought low the device will be selected, power consumption will increase
to active levels and instructions can be written to and data read from the device. After power-up, /CS
must transition from high to low before a new instruction will be accepted. The /CS input must track
the VCC supply level at power-up (see “Write Protection” and figure 20). If needed a pull-up resister
on /CS can be used to accomplish this.
7.3 Serial Data Output (DO)
The SPI Serial Data Output (DO) pin provides a means for data and status to be serially read from
(shifted out of) the device. Data is shifted out on the falling edge of the Serial Clock (CLK) input pin.
7.4 Write Protect (/WP)
The Write Protect (/WP) pin can be used to prevent the Status Register from being written. Used in
conjunction with the Status Register’s Block Protect (BP2, BP1, and BP0) bits and Status Register
Protect (SRP) bits, a portion or the entire memory array can be hardware protected. The /WP pin is
active low.
7.5 HOLD (/HOLD)
The /HOLD pin allows the device to be paused while it is actively selected. When /HOLD is brought
low, while /CS is low, the DO pin will be at high impedance and signals on the DIO and CLK pins will
be ignored (don’t care). When /HOLD is brought high, device operation can resume. The /HOLD
function can be useful when multiple devices are sharing the same SPI signals. (“See Hold function”)
7.6 Serial Clock (CLK)
The SPI Serial Clock Input (CLK) pin provides the timing for serial input and output operations. ("See
SPI "Operations")
7.7 Serial Data Input / Output (DIO)
The SPI Serial Data Input/Output (DIO) pin provides a means for instructions, addresses and data to
be serially written to (shifted into) the device. Data is latched on the rising edge of the Serial Clock
(CLK) input pin. The DIO pin is also used as an output when the Fast Read Dual Output instruction is
executed.
Publication Release Date: September 22, 2006
-7-
Preliminary - Revision I