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W25Q16BV Datasheet, PDF (52/68 Pages) Winbond – 16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI | |||
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W25Q16BV
11.2.32 Continuous Read Mode Reset (FFh or FFFFh)
For Fast Read Dual/Quad I/O operations, âContinuous Read Modeâ Bits (M7-0) are implemented to
further reduce instruction overhead. By setting the (M7-0) to âAxâ hex, the next Fast Read Dual/Quad I/O
operation does not require the BBh/EBh/E7h/E3h instruction code (See 11.2.13 - 11.2.16 for detail
descriptions).
If the system controller is Reset during operation it will likely send a standard SPI instruction, such
as Read ID (9Fh) or Fast Read (0Bh), to the W25Q16BV. However, as with most SPI Serial Flash
memories, the W25Q16BV does not have a hardware Reset pin, so if Continuous Read Mode bits are set
to âAxâ hex, the W25Q16BV will not recognize any standard SPI instructions. To address this possibility, it
is recommended to issue a Continuous Read Mode Reset instruction as the first instruction after a
system Reset. Doing so will release the Continuous Read Mode from the âAxâ hex state and allow
Standard SPI instructions to be recognized. The Continuous Read Mode Reset instruction is shown in
figure 31.
/CS
CLK
IO0
IO1
IO2
IO3
Mode 3
Mode 0
Mode Bit Reset
for Quad I/O
Mode Bit Reset
for Dual I/O
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Mode 3
Mode 0
FFh
FFh
Donât Care
Donât Care
Donât Care
Figure 31. Continuous Read Mode Reset for Fast Read Dual/Quad I/O
To reset âContinuous Read Modeâ during Quad I/O operation, only eight clocks are needed. The
instruction is âFFhâ. To reset âContinuous Read Modeâ during Dual I/O operation, sixteen clocks are
needed to shift in instruction âFFFFhâ.
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