W25Q32V Datasheet, PDF (40/61 Pages) Winbond – 32M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI

W25Q32V
10.2.23 Power-down (B9h)
Although the standby current during normal operation is relatively low, standby current can be further
reduced with the Power-down instruction. The lower power consumption makes the Power-down
instruction especially useful for battery powered applications (See ICC1 and ICC2 in AC Characteristics).
The instruction is initiated by driving the /CS pin low and shifting the instruction code “B9h” as shown in
figure 23.
The /CS pin must be driven high after the eighth bit has been latched. If this is not done the Power-down
instruction will not be executed. After /CS is driven high, the power-down state will entered within the time
duration of tDP (See AC Characteristics). While in the power-down state only the Release from Power-
down / Device ID instruction, which restores the device to normal operation, will be recognized. All other
instructions are ignored. This includes the Read Status Register instruction, which is always available
during normal operation. Ignoring all but one instruction makes the Power Down state a useful condition
for securing maximum write protection. The device always powers-up in the normal operation with the
standby current of ICC1.
Figure 23. Deep Power-down Instruction Sequence Diagram
10.2.24 Release Power-down / Device ID (ABh)
The Release from Power-down / Device ID instruction is a multi-purpose instruction. It can be used to
release the device from the power-down or obtain the devices electronic identification (ID) number.
To release the device from the power-down, the instruction is issued by driving the /CS pin low, shifting
the instruction code “ABh” and driving /CS high as shown in figure 24a. Release from power-down will
take the time duration of tRES1 (See AC Characteristics) before the device will resume normal operation
and other instructions are accepted. The /CS pin must remain high during the tRES1 time duration.
When used only to obtain the Device ID while not in the power-down state, the instruction is initiated by
driving the /CS pin low and shifting the instruction code “ABh” followed by 3-dummy bytes. The Device ID
bits are then shifted out on the falling edge of CLK with most significant bit (MSB) first as shown in figure
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