W25Q32V Datasheet, PDF (2/61 Pages) Winbond – 32M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI

W25Q32V
Table of Contents
1.
GENERAL DESCRIPTION ............................................................................................................... 5
2.
FEATURES....................................................................................................................................... 5
3.
PIN CONFIGURATION SOIC 208-MIL ............................................................................................ 6
4.
PAD CONFIGURATION WSON 6X5-MM / 8X6-MM ....................................................................... 6
5.
PIN DESCRIPTION SOIC 208-MIL, AND WSON 6X5-MM ............................................................. 6
6.
PIN CONFIGURATION SOIC 300-MIL ............................................................................................ 7
7.
PIN DESCRIPTION SOIC 300-MIL .................................................................................................. 7
7.1 Package Types..................................................................................................................... 8
7.2 Chip Select (/CS).................................................................................................................. 8
7.3 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) .................................... 8
7.4 Write Protect (/WP)............................................................................................................... 8
7.5 HOLD (/HOLD) ..................................................................................................................... 8
7.6 Serial Clock (CLK) ................................................................................................................ 8
8.
BLOCK DIAGRAM............................................................................................................................ 9
9.
FUNCTIONAL DESCRIPTION ....................................................................................................... 10
9.1 SPI OPERATIONS ............................................................................................................. 10
9.1.1 Standard SPI Instructions.....................................................................................................10
9.1.2 Dual SPI Instructions ............................................................................................................10
9.1.3 Quad SPI Instructions...........................................................................................................10
9.1.4 Hold Function .......................................................................................................................10
9.2 WRITE PROTECTION ....................................................................................................... 11
9.2.1 Write Protect Features..........................................................................................................11
10. CONTROL AND STATUS REGISTERS ........................................................................................ 12
10.1
STATUS REGISTER .......................................................................................................... 12
10.1.1 BUSY..................................................................................................................................12
10.1.2 Write Enable Latch (WEL) ..................................................................................................12
10.1.3 Block Protect Bits (BP2, BP1, BP0)....................................................................................12
10.1.4 Top/Bottom Block Protect (TB)...........................................................................................12
10.1.5 Sector/Block Protect (SEC) ................................................................................................12
10.1.6 Status Register Protect (SRP1, SRP0)...............................................................................13
10.1.7 Quad Enable (QE) ..............................................................................................................13
10.1.8 Erase Suspend Status (SUS) .............................................................................................13
10.1.9 Status Register Memory Protection ....................................................................................15
10.2
INSTRUCTIONS................................................................................................................. 16
10.2.1 Manufacturer and Device Identification ..............................................................................16
10.2.2 Instruction Set Table 1........................................................................................................17
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