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W83194R-39 Datasheet, PDF (4/21 Pages) Winbond – 100MHZ 3-DIMM CLOCK
W83194R-39/-39A
5.1 Crystal I/O
SYMBOL
Xin
Xout
PRELIMINARY
PIN
I/O
FUNCTION
4
IN Crystal input with internal loading capacitors and
feedback resistors.
5
OUT Crystal output at 14.318MHz nominally.
5.2 CPU, SDRAM, PCI, IOAPIC Clock Outputs
SYMBOL
CPUCLK_F
CPUCLK1
CPU_STOP#
IOAPIC
SDRAM [ 0:12]
PCICLK_F/
*MODE
PCICLK0/*FS3
(W83194R-39A)
PCICLK [ 0:4 ]
(W83194R-39)
BUFFER IN
SDRAM [ 0: 11 ]
PIN
44
43
41
47
17,18,20,21,28
,29,31,32,34,
35,37,38,40
7
8
8,10,11,12,13
I/O
OUT
OUT
IN
OUT
OUT
I/O
I/O
OUT
FUNCTION
Free running CPU clock. Not affected by
CPU_STOP#
Low skew (< 250ps) clock outputs for host
frequencies such as CPU, Chipset and Cache.
Powered by VddL2. Low if CPU_STOP# is low.
This asynchronous input halts CPUCLK1,IOAPIC &
SDRAM(0:12) at logic “0” level when driven low.
High drive buffered output of the crystal, and is
powered by VddL1.
SDRAM clock outputs. Fanout buffer outputs from
BUFFER IN pin.(Controlled by chipset)
Free running PCI clock during normal operation.
Latched Input. Mode=1, Pin 2 is REF0; Mode=0,
Pin2 is PCI_STOP#
Low skew (< 250ps) PCI clock outputs.
Latched input for FS3 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
Low skew (< 250ps) PCI clock outputs. Synchronous
to CPU clocks with 1-48ns skew(CPU early).
15
17,18,20,21,
28,29,31,32,
34,35,37,38
IN Inputs to fanout for SDRAM outputs.
O Synchronous DRAM DIMs clocks which have the
same frequency as CPU clocks
Publication Release Date: May 1998
-4-
Revision 0.20