W83194R-39 Datasheet, PDF (18/21 Pages) Winbond – 100MHZ 3-DIMM CLOCK

W83194R-39/-39A
11.0 OPERATION OF DUAL FUCTION PINS
PRELIMINARY
Pins 2, 7, 8, 25, and 26 are dual function pins and are used for selecting different functions in this
device (see Pin description). During power up, these pins are in input mode (see Fig1), therefore,
and are considered input select pins. When Vdd reaches 2.5V, the logic level that is present on these
pins are latched into their appropriate internal registers. Once the correct information are properly
latched, these pins will change into output pins and will be pulled low by default. At the end of the
power up timer (within 3 ms) outputs starts to toggle at the specified frequency.
2.5V
Vdd
#7 PCICLK_F/MODE
#46 REF1/FS2
#25 24/FS1
#26 48/FS0
Output tri-state
Input
Output pull-low
Within 3ms
Output
All other clocks ^{Output tri-state Output pull-low}
Each of these pins are a large pull-up resistor ( 250 kΩ @3.3V ) inside. The default state will be logic
1, but the internal pull-up resistor may be too large when long traces or heavy load appear on these
dual function pins. Under these conditions, an external 10 kΩ resistor is recommended to be
connected to Vdd if logic 1 is expected. Otherwise, the direct connection to ground if a logic 0 is
desired. The 10 kΩ resistor should be place before the serious terminating resistor. Note that these
logic will only be latched at initial power on.
If optional EMI reducing capacitor are needed, they should be placed as close to the series
terminating resistor as possible and after the series terminating resistor. These capacitor has typical
values ranging from 4.7pF to 22pF.
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Publication Release Date: May 1998
Revision 0.20