W982516AH Datasheet, PDF (37/41 Pages) Winbond – 4M x 4 BANKS x 16BIT SDRAM

Operating Timing Example, continued
CKE/DQM Input Timing (Write Cycle)
W982516AH
CLK cycle No.
1
2
CLK
External
Internal
CKE
DQM
DQ
D1
D2
CLK cycle No.
CLK
External
Internal
CKE
DQM
DQ
1
D1
2
D2
CLK cycle No.
CLK
External
Internal
CKE
DQM
DQ
1
D1
2
D2
3
4
5
6
7
D3
DQM MASK
(1)
D5
D6
CKE MASK
3
4
5
6
7
D3
D5
D6
DQM MASK
(2)
CKE MASK
3
4
5
6
7
D3
D4
CKE MASK
(3)
D5
D6
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Publication Release Date: February 2001
Revision A2