W39V040C Datasheet, PDF (32/36 Pages) Winbond – 512K × 8 CMOS FLASH MEMORY WITH LPC INTERFACE

13.7 FGPI Register/Product ID Readout Timing Diagram
W39V040C
CLK
#RESET
#LFRAM
LAD[3:0]
Start
0000b
Memory
Read
Cycle
010Xb
1111b
1111b
1011b
Address
XXXXb 1110b
0001b
0000b
0000b
TAR
Sync
1111b Tri-State 0000b
Data
D[3:0] D[7:4]
TAR
1 Clock 1 Clock
Load Address "FFBC0100(hex)" in 8 Clocks
& "FFBC0000(hex)/FFBC0001(hex) for product ID
2 Clocks 1 Clock Data out 2 Clocks
Note: Read the DQ[4:0] to capture the states(High or Low) of the GPI[4:0] input pins. The DQ[7:5] are reserved bits.
Next Start
0000b
1 Clock
13.8 Reset Timing Diagram
VDD
CLK
#RESET
LAD[3:0]
#LFRAM
T_PRST
T_KRST
T_RSTP
TRST
F
T_RST
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