W9864G2JH_13 Datasheet, PDF (14/43 Pages) Winbond – 512K x 4 BANKS x 32BITS SDRAM

W9864G2JH
9. ELECTRICAL CHARACTERISTICS
9.1 Absolute Maximum Ratings
PARAMETER
SYMBOL
RATING
UNIT NOTES
Voltage on any pin relative to VSS
VIN, VOUT -0.5 ~ VDD + 0.5 (≤ 4.6V max.) V
1
Voltage on VDD/VDDQ supply relative to VSS VDD, VDDQ
-0.5 ~ 4.6
V
1
Operating Temperature for -5/-6/-7
TA
0 ~ 70
°C
1, 2
Operating Temperature for -6I/-6A
TA
-40 ~ 85
°C
1, 2
Operating Temperature for -6K
TA
-40 ~ 105
°C
1, 2
Operating Temperature for -6K
TCASE
-40 ~ 105
°C 1, 3, 4, 5, 6
Storage Temperature
TSTG
-55 ~ 150
°C
1
Soldering Temperature (10s)
TSOLDER
260
°C
1
Power Dissipation
PD
1
W
1
Short Circuit Output Current
IOUT
50
mA
1
Notes:
1. Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of
the device
2. Operating ambient temperature is the surrounding temperature of the SDRAM.
3. Operating case temperature is the case surface temperature on the center/top side of the SDRAM
4. Supporting -40°C ≤ TA / TCASE ≤ 85°C with full AC and DC specifications.
5. Supporting -40°C ≤ TA / TCASE ≤ 85°C and being able to extend to 105°C with extend Auto Refresh commands in frequency
to a 16 mS period ( tREF = 3.9 µS).
6. During operation, the DRAM operation temperature must be maintained between -40 to 105°C for automotive parts under all
specification parameters.
9.2 Recommended DC Operating Conditions
PARAMETER
SYM. MIN. TYP. MAX.
Power Supply Voltage for -5/-6/-6I/-6A/-6K
VDD 3.0 3.3
3.6
Power Supply Voltage (I/O Buffer)
for -5/-6/-6I/-6A/-6K
VDDQ 3.0
3.3
3.6
Power Supply Voltage for -7
VDD 2.7 3.3
3.6
Power Supply Voltage (I/O Buffer) for -7
VDDQ 2.7
3.3
3.6
Input High Voltage
VIH
2
-
VDD + 0.3
Input Low Voltage
VIL -0.3
-
+0.8
Output logic high voltage
VOH 2.4
-
-
Output logic low voltage
VOL
-
-
0.4
Input leakage current
II(L) -10
-
10
Output leakage current
Io(L) -10
-
10
Note:
1. VIH (max.) = VDD/VDDQ+1.5V for pulse width ≤ 5 nS.
2. VIL (min.) = VSS/VSSQ-1.5V for pulse width ≤ 5 nS.
3. Any input 0V ≤ VIN ≤ VDDQ.
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
4. Output disabled, 0V ≤ VOUT ≤ VDDQ
UNIT
V
V
V
V
V
V
V
V
µA
µA
NOTES
1
2
IOH= -2mA
IOL= 2mA
3
4
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Publication Release Date: Oct. 07, 2013
Revision A02