W78958B Datasheet, PDF (11/28 Pages) Winbond – 8-BIT EMULATION MICROCONTROLLER

W78958B
ICESET Emulation Mode Enable, Input, Active High
This pin, which is used to facilitate ICE applications, is default low with an internal pull-low resistor.
When ICESET is set active, the W78958B will enter the emulation mode. In this mode, the
W78958B's internal clock and states are frozen, but the oscillator continues to run. The contents of
the SFRs, PC, the 256-byte internal RAM, and the external program/data memory can then be
accessed easily by ICE makers to eliminate board-level glue logic. As soon as the ICESET pin goes
low again, the W78958B will release the internal clock and return to its original operating mode.
EMU Emulation Mode Active Indicator, Output, Active High
When ICESET is set to high and synchronized with the internal clock, EMU will go high at the end of
the S1 state of the next instruction. This pin indicates that the W78958B has entered the emulation
mode after ICESET acknowledgment. When ICESET is set to low, the W78958B clears the content of
IR (00H is the opcode of instruction NOP), and then leave the emulation mode. At this time, the
W78958B runs a NOP instruction to prevent improper code from being executed, because the
content of PC may have been changed. After the W78958B leaves the emulation mode−i.e., the
internal clock and states start to run−it takes four states to fetch the second (ignored) byte of NOP.
EMU will go low until the complete NOP instruction has been finished−that is, it will go low at the end
of the S4 state. EMU goes low four states after the device exits the emulation mode.
CLKS1 Machine Cycle Clock output pin
CLKS1 outputs the internal S1 state cycle clock.
BLOCK DIAGRAM
SFR
RAM
256
Bytes
DP4
AP5
AP6
AP7
Alternate
Emulation
Type select
logic
CPU
CORE
Data Bus
Interrupt
Port 8
Alternate
Port 0
Port 1
Alternate
Port 2
Port 3
Alternate
Serial
Port
INT0
INT1
INT2
INT3
Timer0
Timer1
Timer2
Note: AP7, Port 8, INT2 and INT3 are valid only in advanced type.
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Publication Release Date: September 1997
Revision A3