W29C102 Datasheet, PDF (11/21 Pages) Winbond – 64K 16 CMOS FLASH MEMORY

W29C102
AC Characteristics, continued
Read Cycle Timing Parameters
(VDD = 5.0V ±10%, VSS = 0V, TA = 0 to 70° C)
PARAMETER
SYM. W29C102-70 W29C102-90 W29C102-12 UNIT
MIN. MAX. MIN. MAX. MIN. MAX.
Read Cycle Time
TRC 70
-
90
- 120 -
nS
Chip Enable Access Time
TCE
-
70
-
90
- 120 nS
Address Access Time
TAA
-
70
-
90
- 120 nS
Output Enable Access Time
TOE
-
35
-
45
-
60 nS
CE High to High-Z Output
TCHZ
-
25
-
25
-
30 nS
OE High to High-Z Output
TOHZ
-
25
-
25
-
30 nS
Output Hold from Address Change TOH 0
-
0
-
0
-
nS
Byte/Page-write Cycle Timing Parameters
PARAMETER
SYMBOL
Write Cycle (erase and program)
TWC
Address Setup Time
TAS
Address Hold Time
TAH
WE and CE Setup Time
TCS
WE and CE Hold Time
TCH
OE High Setup Time
TOES
OE High Hold Time
TOEH
CE Pulse Width
TCP
WE Pulse Width
TWP
WE High Width
TWPH
Data Setup Time
TDS
Data Hold Time
TDH
Byte Load Cycle Time
TBLC
MIN.
-
0
50
0
0
0
0
70
70
100
50
0
-
TYP.
-
-
-
-
-
-
-
-
-
-
-
-
-
Notes:
All AC timing signals observe the following guidelines for determining setup and hold times:
(a) High level signal's reference level is VIH.
(b) Low level signal's reference level is VIL.
MAX.
10
-
-
-
-
-
-
-
-
-
-
-
150
UNIT
mS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
µS
- 11 -
Publication Release Date: March 1998
Revision A3