W83301R Datasheet, PDF (10/16 Pages) Winbond – ACPI-STR Controller

W83301R
Preliminary
7.2 ACPI State Control
In order to meet the ACPI specification, the W83301R implement a state machine as
shown as Figure 5 to generate ACPI-compliant power state transition.
There are only five states in the state machine cause the W83301R only focus on the
memory ACPI control, and the five states are G3 (Mechanical-Off State), S0 (Full-Power
State), S3 (Sleeping State-Suspend to RAM), S5_On (Soft-Off State), S5_Off and all of these
states changed to the other according to the condition of S3#, S5# and 5V_DLEN#. On the
other hand, cause of the W83301R allows customer to disable/enable the 5V_DUAL output
in S5 state via 5V_DLEN# pin, there are two states, S5_On and S5_Off, corresponding to S5
state. A soft ramp-up mechanism is needed to protect the 5V_DL output from the rush
current attack during the S5_Off to S5_On state transition. Same as the 5V_DL output, the
W83301R also provides soft ramp-up mechanism during S5_On to S0 state transition in
each STR output.
In the state machine, when the power on, and the 5V input from power supply arrive
4.5V, the chip will enter S5_Off first from G3, and ramp-up into S5_On state by two
conditions, the one is when 5V_DLEN#=0 under standby power supply to resume the 5V_DL
output, the other one is S3#=1 and S5#=1 the system will enter S1 state.
During S5_On state, the chip will return back to S5_Off when the customer wants
disabling the 5V_SB output (5V_DLEN#=1) to save some power. And the chip will drive all
outputs into S0 state will S3#=1 and S5#=1.
When the system under the S0 state, the system should enter the S3-sleeping
(S3#=0, S5#=1) or S5-soft off (S5#=0) state when the system idle for a long time or user
power-off.
When the system suspend to RAM, the system will be wakeup and enter S0-full
power state by (S3#=1, S5#=1,PWOK=1), or get into S5-sleeping soft off state by
(S5#=0)
Table 2. W83301R Outputs Table
State
G3
5V_DL
Off
STR1
Off
STR2
Off
STR3
Off
LUV Activity *
No
S5 (5V_DL Off)
Off
Off
Off
Off
No
On
S5 (5V_DL On) (Driven by
Off
Off
Off
No
5V_DLSB)
On
S0
(Driven by
On
On
On
Yes
5V_DRV)
On
S3
(Driven by
On
On
On
Yes
5V_DLSB)
*When the STR2 & STR3 configured as bus termination controller, only STR1 has linear under voltage
function.
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Revision 0.6