WCMA2016U4B Datasheet, PDF (7/12 Pages) Weida Semiconductor, Inc. – 128K x 16 Static RAM

Switching Waveforms (continued)
Write Cycle No. 1(WE Controlled) ^{[12, 16, 17]}
ADDRESS
CE
t_WC
t_{S C E}
t_AW
t_SA
t_PWE
WE
BHE/BLE
t_BW
OE
DATA I/O
NOTE 18
t_HZOE
t_SD
DATA_IN VALID
Write Cycle No. 2 (CE Controlled) ^{[12, 16, 17]}
ADDRESS
CE
WE
t_SA
t_AW
t_WC
t_SCE
t_PWE
BHE/BLE
t_BW
OE
DATA I/O
NOTE 18
t_HZOE
t_SD
DATA_IN VALID
Notes:
16. Data I/O is high-impedance if OE = V_IH.
17. If CE goes HIGH simultaneously withWE HIGH, the output remains in a high-impedance state.
18. During this period, the I/Os are in output state and input signals should not be applied.
WCMA2016U4B
t_HA
t_HD
t_HA
t_HD
7