W3EG72256S-JD3 Datasheet, PDF (9/14 Pages) White Electronic Designs Corporation – 2GB-256Mx72 DDR SDRAM REGISTERED ECC w/PLL

White Electronic Designs
W3EG72256S-JD3
-AJD3
PRELIMINARY
DDR SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND
RECOMMENDED AC OPERATING CONDITIONS (continued)
0°C ≤ TA ≤ +70°C; VCC = +2.5V ±0.2V, VCCQ = +2.5V ±0.2V
AC Characteristics
335
262/263/265
202
Parameter
ACTIVE to READ or WRITE delay
PRECHARGE command period
DQS read preamble
DQS read postamble
ACTIVE bank a to ACTIVE bank b command
DQS write preamble
DQS write preamble setup time
DQS write postamble
Write recovery time
Internal WRITE to READ command delay
Data valid output window
REFRESH to REFRESH command interval
Average periodic refresh interval
Terminating voltage delay to VCC
Exit SELF REFRESH to non-READ command
Exit SELF REFRESH to READ command
Symbol
tRCD
tRP
tRPRE
tRPST
tRRD
tWPRE
tWPRES
tWPST
tWR
tWTR
NA
tREFC
tREFI
tVTD
tXSNR
tXSRD
Min
Max
15
15
0.9
1.1
0.4
0.6
12
0.25
0
0.4
0.6
15
1
tQH-tDQSQ
70.3
7.8
0
126
200
Min
Max
15
15
0.9
1.1
0.4
0.6
15
0.25
0
0.4
0.6
15
1
tQH-tDQSQ
70.3
7.8
0
127.5
200
Min
Max
15
15
0.9
1.1
0.4
0.6
15
0.25
0
0.4
0.6
15
1
tQH-tDQSQ
70.3
7.8
0
127.5
200
Units
ns
ns
tCK
tCK
ns
tCK
ns
tCK
ns
tCK
ns
μs
μs
ns
ns
tCK
Notes
19
10,11
9
13
12
12
December 2004
Rev. 2
9
White Electronic Designs Corporation • [phone] • www.wedc.com