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W3EG72256S-JD3 Datasheet, PDF (1/14 Pages) White Electronic Designs Corporation – 2GB-256Mx72 DDR SDRAM REGISTERED ECC w/PLL
White Electronic Designs
W3EG72256S-JD3
-AJD3
PRELIMINARY*
2GB-256Mx72 DDR SDRAM REGISTERED ECC w/PLL
FEATURES
Double-data-rate architecture
DDR200, DDR266 and DDR333:
• JEDEC design specifications
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input.
Auto and self refresh
Serial presence detect
Power supply: VCC = 2.5V ± 0.20V
JEDEC standard 184 pin DIMM package
• Package height option:
JD3: 30.48mm (1.20")
AJD3: 28.70mm (1.13")
• Consult factory for availability of lead-free
products.
DESCRIPTION
The W3EG72256S is a 256Mx72 Double Data Rate
SDRAM memory module based on 1Gb DDR SDRAM
components. The module consists of eighteen 1Gb DDR
SDRAMs in 66 pin TSOP packages mounted on a 184
pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lengths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualified or characterized and is subject to
change without notice.
Clock Speed
CL-tRCD-tRP
DDR333 @CL=2.5
166MHz
2.5-3-3
Advance information: Speed may not be available.
OPERATING FREQUENCIES
DDR266 @CL=2
133MHz
2-2-2
DDR266 @CL=2
133MHz
2-3-3
DDR266 @CL=2.5
133MHz
2.5-3-3
DDR200 @CL=2
100MHz
2-2-2
December 2004
Rev. 2
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com