W3EG72129S-JD3 Datasheet, PDF (8/12 Pages) White Electronic Designs Corporation – 1GB - 2x64Mx72 DDR SDRAM REGISTERED w/PLL

White Electronic Designs
W3EG72129S-JD3
PRELIMINARY
DDR SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND
RECOMMENDED AC OPERATING CONDITIONS (continued)
Notes 1-5, 7; notes appear following parameter tables; 0°C ≤ TA ≤ +70°C; VCC = +2.5V ±0.2V, VCCQ = +2.5V ±0.2V
AC Characteristics
403
335
262
263/265
202
Parameter
Symbol Min Max Min Max Min Max Min Max Min Max Units Notes
ACTIVE to READ or WRITE delay
PRECHARGE command period
DQS read preamble
DQS read postamble
ACTIVE bank a to ACTIVE bank b command
DQS write preamble
DQS write preamble setup time
DQS write postamble
Write recovery time
Internal WRITE to READ command delay
Data valid output window
REFRESH to REFRESH command interval
Average periodic refresh interval
Terminating voltage delay to VCC
Exit SELF REFRESH to non-READ command
Exit SELF REFRESH to READ command
tRCD 15
18
15
20
20
ns
tRP 15
18
15
20
20
ns
tRPRE 0.9 1.1 0.9 1.1 0.9 1.1 0.9 1.1 0.9 1.1 tCK 19
tRPST 0.4 0.6 0.4 0.6 0.4 0.6 0.4 0.6 0.4 0.6 tCK
tRRD 10
12
15
15
15
ns
tWPRE 0.25
0.25
0.25
0.25
0.25
tCK
tWPRES 0
0
0
0
0
ns 10,11
tWPST 0.4 0.6 0.4 0.6 0.4 0.6 0.4 0.6 0.4 0.6 tCK
9
tWR 15
15
15
15
15
ns
tWTR
2
1
1
1
1
tCK
NA
tQH-tDQSQ
tQH-tDQSQ
tQH-tDQSQ
tQH-tDQSQ
tQH-tDQSQ
ns 13
tREFC
70.3
70.3
70.3
70.3
70.3 μs 12
tREFI
7.8
7.8
7.8
7.8
7.8 μs 12
tVTD
0
0
0
0
0
ns
tXSNR 70
75
75
75
75
ns
tXSRD 200
200
200
200
200
tCK
October 2005
Rev. 3
8
White Electronic Designs Corporation • [phone] • www.wedc.com