CMA3000-D0X Datasheet, PDF (19/35 Pages) VTI technologies – 3-axis accelerometer

CMA3000-D0X Series
In cases with multiple slaves in SPI bus it is recommended that I2C transmission is disabled by
setting I2C_DIS bit to '1' in CRTL register. After CMA3000 start up the I2C_DIS bit is always 0 (I²C
transmission enabled).
4.2 I²C Interface
I²C is a 2-wire serial interface. It consists of one master device and one or more slave devices. The
master is defined as a micro controller providing the serial clock (SCL), and the slave as any
integrated circuit receiving the SCL clock from the master. The CMA3000 sensor always operates
as a slave device in master-slave operation mode. When using an SPI interface, a hardware
addressing is used (slaves have dedicated CSB signals), the I²C interface uses a software based
addressing (slave devices have dedicated bit patterns as addresses). The default I²C device
address for CMA3000 is 00011100b (1Ch) (pre-programmed during CMA3000 production).
The CMA3000 is compatible to the Philips I²C specification V2.1. Main used features of the I²C
interface are:
- 7-bit addressing, CMA3000 I²C device address is 1Ch
- Supports standard mode and fast mode
- Start / Restart / Stop
- Slave transceiver mode
- Designed for low power consumption
4.2.1 I²C frame format
4.2.1.1
I²C write mode
In I²C write mode, the first 8 bits after device address define the CMA3000 internal register address
to be written.
4.2.1.2
I²C read mode
The read mode operates as described in Philips I²C specification. I²C read operation returns the
content of the register which address is defined in I2C read frame. Read data is acknowledged by
I²C master.
4.2.2
Examples of I²C communication
Examples of I²C communication are presented below in Figure 10. Address byte includes 7 device
address bits (1Ch=0011100b) followed by the R/W bit.
Figure 10 I²C format
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