VSC7126 Datasheet, PDF (3/16 Pages) Vitesse Semiconductor Corporation – 1.0625 Gbits/sec Fibre Channel Transceiver

VITESSE
SEMICONDUCTOR CORPORATION
Datasheet
VSC7126
1.0625 Gbits/sec Fibre
Channel Transceiver
by the adjoining protocol logic on the falling edge of RBC(0). In order to maximize the setup and hold times
available at this interface, the parallel data is loaded into the output register at a point nominally midway
between the falling edges of RBC(0).
If serial input data is not present, or does not meet the required baud rate, the VSC7126 will continue to
produce a recovered clock so that downstream logic may continue to function. In the absence of a signal, the
RBC(0)/RBC(1) output clocks will immediately lock to the TBC reference clock.
Word Alignment:
The VSC7126 provides 7-bit Fibre Channel comma character recognition and data word alignment. Word
synchronization is enabled by asserting EN_CDET HIGH. When synchronization is enabled, the VSC7126
constantly examines the serial data for the presence of the Fibre Channel “comma” character. This pattern is
“0011111XXX”, where the leading zero corresponds to the first bit received. The comma sequence is not con-
tained in any normal 8B/10B coded data character or pair of adjacent characters. It occurs only within special
characters, known as K28.1, K28.5 and K28.7, which are defined specifically for synchronization in Fibre
Channel systems. Improper alignment of the comma character is defined as any of the following conditions:
1) The comma is not aligned within the 10-bit transmission character such that T0...T6 = “0011111”
2) The comma straddles the boundary between two 10-bit transmission characters.
When EN_CDET is HIGH and an improperly aligned comma is encountered, the internal data is shifted in
such a manner that the comma character is aligned properly in R0:6 as shown in Figure 1. This results in proper
character and word alignment. When the parallel data alignment changes in response to an improperly aligned
comma pattern, some data which would have been presented on the parallel output port may be lost. However,
the synchronization character and subsequent data will be output correctly and properly aligned. When
EN_CDET is LOW, the current alignment of the serial data is maintained indefinitely, regardless of data pattern.
On encountering a comma character, COM_DET is driven HIGH to inform the user that realignment of the
parallel data field may have occurred. The COM_DET pulse is presented simultaneously with the comma char-
acter and has a duration equal to the data. The COM_DET signal is timed such that it can be captured by the
adjoining protocol logic on the falling edge of RBC(0). Functional waveforms for synchronization are given in
Figure 2 and Figure 3. Figure 2 shows the case when a comma character is detected and no phase adjustment is
necessary. It illustrates the position of the COM_DET pulse in relation to the comma character on R0:6.
Figure 3 shows the case where the K28.5 is detected, but it is out of phase and a change in the output data align-
ment is required. Note that up to three characters prior to the comma character may be corrupted by the realign-
ment process.
Signal Detection:
An output, LUNUSE, is provided to signal when the link is open or down. This signal is asserted if R0:19
are all either LOW or HIGH and EWRAP is LOW.
G52148-0, Rev. 4.3
3/4/99
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: [phone]
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