VSC7126 Datasheet, PDF (13/16 Pages) Vitesse Semiconductor Corporation – 1.0625 Gbits/sec Fibre Channel Transceiver

Datasheet
VSC7126
VITESSE
SEMICONDUCTOR CORPORATION
1.0625 Gbits/sec Fibre
Channel Transceiver
Pin #
65,63,59,57,
55,52,50,48,
45,43,64,62,
58,56,54,51,
49,47,44,42
34
70
69
39
38
27
37
35
66
26
28
29
1,21,30,68,72
40,41,60,61
74
7,13,25,32,33,
67,71,75
36,46,53
76,80
73
78
Name
R0:19
EWRAP
RX+
RX-
RBC(0)
RBC(1)
EN_CDET
COMDET
TXEN#
LUNUSE
TEST1
TEST2
TEST3
VSS
VSST
VSSA
VDD
VDDT
VDDP
VDDA
N/C
Description
Receive Data Bus, Bits 0 thru 19
OUTPUTS - TTL
20-bit received character. Parallel data on this bus is clocked out on the rising edge of
RBC(0). R0 is the first bit received on RX+/RX-.
Enable Internal WRAP Mode.
INPUT - TTL
LOW for Normal Operation. When HIGH, an internal loopback path from the
transmitter to the receiver is enabled, TX+ = HIGH and TX- is LOW.
Receive Serial Inputs
INPUTS - Differential PECL
The receiver inputs when EWRAP is LOW. Internally biased to VDD/2, with 3.3KΩ
resistors to VDD and GND.
(AC Coupling recommended)
Recovered Byte Clock and Complement
OUTPUT - TTL
Recovered clock and complement derived from one twentieth of the RX+/- data stream.
The rising edge of RBC(0) corresponds to a new word on R0:19.
ENable Comma DETect.
INPUT - TTL
Enables comma detection and word resynchronization when HIGH. When LOW, keeps
current word alignment and disables comma detection.
COMma DETect
OUTPUT - TTL
This output goes HIGH to indicate that R0:6 contains a Comma Character (‘0011111’).
COMDET will go HIGH only during a cycle when RBC(0) is falling. COMDET is
enabled by EN_CDET being HIGH.
Transmitter ENable
INPUT - TTL
When LOW, the TX outputs transmit serial data. When HIGH, the TX+ is HIGH and the
TX- is LOW.
Link UNUSE
OUTPUT - TTL
Normally is LOW. If R0:19 is all LOW or all HIGH and EWRAP is LOW, this output
will be asserted HIGH to indicate an open link on RX+/-.
TEST Mode Pins
Factory test pins. Tie to VDD for normal operation.
INPUT - TTL
Digital Ground
Digital Ground for TTL Outputs
Analog Ground
Digital Power (3.3V)
Digital Power for TTL outputs (3.3V)
Digital Power for PECL outputs (3.3V)
Analog Power (3.3V)
Not Internally Connected.
G52148-0, Rev. 4.3
3/4/99
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: [phone]
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