SI9122 Datasheet, PDF (9/17 Pages) Vishay Siliconix – 500-kHz Half-Bridge DC-DC Converter With Integrated Secondary Synchronous Rectification Drivers

Care needs to be taken if there is a delay prior to the external
circuit feeding back to the V_CC supply. To prevent excessive
power dissipation within the IC it is advisable to use an external
PNP device. A pin has been incorporated on the IC,
(REG_COMP) to provide compensation when employing the
external device. In this case the V_IN pin is connected to the
base of the PNP device and controls the current, while the
REG_COMP pin determines the frequency compensation of
the circuit. To understand the operation please refer to
Figure 5.
The soft-start circuit is designed for the dc-dc converter to
start-up in an orderly manner and reduce component stress on
the IC. This feature is programmable by selecting an external
C_SS. An internal 20-mA current source charges C_SS from 0 V
to the final clamped voltage of 8 V. In the event of UVLO or
shutdown, V_SS will be held low (<1 V) disabling driver
switching. To prevent oscillations, a longer soft-start time may
be needed for high capacitive loads and high peak output
current applications.
Reference
The reference voltage of Si9122 is set at 3.3 V. The reference
voltage is de-coupled externally with 0.1-mF capacitor. The
V_REF voltage is 0 V in shutdown mode and has 50-mA source
capability.
Voltage Mode PWM Operation
Under normal load conditions, the IC operates in voltage mode
and generates a fixed frequency pulse width modulated signal
to the drivers. Duty cycle is controlled over a wide range to
maintain output voltage under line and load variation. Voltage
feed forward is also included to take account of variations in
supply voltage V_IN.
In the half-bridge topology requiring isolation between output
and input, the reference voltage and error amplifier must be
supplied externally, usually on the secondary side. The error
information is thus passed to the power controller through an
opto-coupling device. This information is inverted, hence 0 V
represents the maximum duty cycle, whilst 2 V represents
minimum duty cycle. The error information enters the IC via pin
EP, and is passed to the PWM generator via an inverting
amplifier. The relationship between Duty cycle and V_EP is
shown in the Typical Characteristic Graph,Duty Cycle vs. V_EP
25_C , page 19. Voltage feedforward is implemented by taking
the attenuated V_IN signal at V_INDET and directly modulating the
duty cycle. The relationship between Duty cycle and V_INDET is
shown in the the Typical Characteristic Graph, Duty Cycle vs.
V_INDET, page 16.
At start-up, i.e., once V_CC is greater than V_UVLO, switching is
initiated under soft-start control which increases primary
switch on-times linearly from D_MIN to D_MAX over the soft-start
period. Start-up from a V_INDET power down is also initiated
under soft-start control.
Half-Bridge and Synchronous Rectification Timing
Sequence
The PWM signal generated within the Si9122 controls the low
and high-side bridge drivers on alternative cycles. A period of
Document Number: 71815
S-41944—Rev. F, 18-Oct-04
Si9122
Vishay Siliconix
inactivity always results after initiation of the soft-start cycle
until the soft-start voltage reaches approximately 1.2 V and
PWM controlled switching begins. The first bridge driver to
switch is always the low-side, D_L as this allows charging of the
high-side boost capacitor.
The timing and coordination of the drives to the primary and
secondary stages is very important and shown in Figure 3. It
is essential to avoid the situation where both of the secondary
MOSFETs are on when either the high or the low-side switch
are active. In this situation the transformer would effectively be
presented with a short across the output. To avoid this, a
dedicated break-before-make circuit is included which will
generate non overlapping waveforms for the primary and the
secondary drive signals. This is achieved by a programmable
timer which delays the switching on of the primary driver
relative to the switching off of the related secondary and
subsequently delays the switching on of the secondary relative
to the switching off of the related primary.
Typical variation in the t_BBM3 and t_BBM4 delay with L_X voltage
is shown in graphs t_BBM3, t_BBM4 and for R_BBM = 33 kW. This
is due to a reduction in propagation delay through the high-side
driver path as the L_X voltage increases and must be
considered in setting the delay for the system level design.
Variation of BBM time with R_BBM is shown in graph t_BBM1 to
t_BBM4 vs. R_BBM.
Primary High- and Low-Side MOSFET Drivers
The drive voltage for the low-side MOSFET switch is provided
directly from V_CC. The high-side MOSFET however requires
the gate voltage to be enhanced above V_IN. This is achieved
by bootstraping the V_CC voltage onto the L_X voltage (the
high-side MOSFET source). In order to provide the
bootstrapping an external diode and capacitor are required as
shown on the application schematic. The capacitor will charge
up after the low-side driver has turned on. The switch gate
drive signals D_H and D_L are shown in Figure 3.
Secondary MOSFET Drivers
The secondary side MOSFETs are driven from the Si9122 via
a center tapped pulse transformer and inverter drivers. The
waveforms from the IC SRH and SRL are shown in Figure 3.
Of importance is the relative voltage between SRH and SRL,
i.e. that which is presented across the primary of the pulse
transformer. When both potentials of SRL and SRH are equal
then by the action of the inverting driver both secondary
MOSFETs are left on.
Oscillator
The oscillator is designed to operate at a nominal frequency of
500 kHz. The 500-kHz operating frequency allows the converter
to minimize the inductor and capacitor size, improving the power
density of the converter. The oscillator and therefore the
switching frequency is programmable by attaching a resistor to
the R_OSC pin. Under overload conditions the oscillator frequency
is reduced by the current overload protection to enable a constant
current to be maintained into a low impedance circuit.
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