SI9124 Datasheet, PDF (8/16 Pages) Vishay Siliconix – 500-kHz Push-Pull DC-DC Converter With Integrated Secondary Synchronous Rectification Control

Si9124
Vishay Siliconix
New Product
DETAILED FUNCTIONAL BLOCK DIAGRAM
V_CC
V_IN
Pre-Regulator
V_REF
V_INDET
Reference
Voltage
3.3 V
V_REF
Voltage
Feedforward
+
-
V_REF
V_UV
+
V_SD
-
550 mV
V_REG
9.1 V
+
-
V_UVLO
+
-
160_C Temp
Protection
9.1 V
8.6 V
Primary A
Driver
V_CC2
OUT_A
R_OSC
EP
Oscillator
OSC
Clock
132 kW
60 kW
-
+
CS2
CS1
V_REF/2
Current
Control
Gain
+
-
100 mV
SS
GND
Clock
V_SD V_UV V_UVLO
Logic
OTP
-
+
PWM
Generator
Logic
Blanking
V_CC
20 mA
SS Enable
80 mA
SS Control
PGND₂
V_{CC Primary B}
Driver
OUT_B
PGND
Secondary
V_{CC Synchronous}
Driver
SEC_SYNC
Figure 5.
DETAILED OPERATION
Start-Up
A detailed Functional Block Diagram is shown in Figure 5 with
additional detail of the pre-regulator shown in Figure 6. The
pre-regulator circuit acts as a linear regulator to provide V_CC
directly from the V_INEXT supply until the V_CC supply voltage
between 10 V to 13.2 V can be sustained from an auxiliary
winding from the secondary of the power inductor.
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8
When V_INEXT rises above 0 V (see Figure 6), the internal
pre-regulator begins charging the external capacitor on V_CC.
The charging current is limited to typically 40 mA by the internal
DMOS device. When Vcc exceeds the UVLO voltage of 8.8 V,
a soft-start cycle of the controller is initiated to provide power
to the secondary. Once switching commences, the internal
gate drivers for the primary side switching transistors and the
drive current into the secondary synchronization driver draw
additional current from the V_CC capacitor and pre-regulator.
Document Number: 72099
S-03638—Rev. B, 20-Mar-03