SI9913_04 Datasheet, PDF (7/9 Pages) Vishay Siliconix – Half-Bridge MOSFET Driver for Switching Power Supplies

Si9913
Vishay Siliconix
Bootstrap Supply Operation
(see Functional Block Diagram)
The power to drive the high-side MOSFET (Q2) gate comes
from the bootstrap capacitor (C_BOOT). This capacitor charges
through D1 during the time when the low-side MOSFET is on
(V_S is at GND potential ), and then provides the necessary
charge to turn on the high-side MOSFET. C_BOOT should be
sized to be greater than ten times the high-side MOSFET gate
capacitance, and large enough to supply the bootstrap current
(I_BOOT) during the high-side on time, without significant voltage
droop.
Synchronous Enable
The synchronous enable pin serves to enable and disable the
drive to the low-side MOSFET gate. With SYN high, the
low-side MOSFET is driven on and off in antiphase with the
high-side MOSFET to form a synchronous rectifier. This
improves efficiency at high load currents because the flyback
current is carried by the MOSFET, thus eliminating the diode
drop. With SYN low, the low-side MOSFET is held off all the
time. This is particularly useful for discontinuous operation
under light load or pulse skipping mode, where there is a long
off time, because it prevents current flowing back from the
output to ground during the off time.
Layout Considerations
There are a few critical layout considerations for these parts.
Firstly, the IC must be decoupled as closely as possible to the
power pins. Secondly the IC should be placed physically close
to the high- and low-side MOSFETs it is driving. The major
consideration is that the MOSFET gates must be charged or
discharged in a few nanoseconds, and the peak current to do
this is of the order of 1 A. This current must flow from the
decoupling and bootstrap capacitors to the IC, and from the
output driver pin to the MOSFET gate, returning from the
MOSFET source to the IC. The aim of the layout is to reduce
the parasitic inductance of these current paths as much as
possible. This is accomplished by making these traces as
short as possible, and also running trace and its current return
path adjacent to each other.
APPLICATIONS
PWM IN
Enable
4
U1
+5 V
1
OUT_H
2
GND
8
V_S
7
BOOT
3
IN
6
V_DD
4 _SYN
5
OUT_L
Si9913
C1
0.1 mF
4
C2
0.1 mF
+V_DC
0.1 mF
C3
Q1
Si4412
15 mF
C4 ⁺
L1
15 mH
1 mF
C5
Q2
Si4412
GND
R_LOAD
GND
GND
FIGURE 1. Typical Applications Schematic Circuit Used to Obtain Typical Rising and Falling Switching Waveforms
Document Number: 71343
S-40133—Rev. B, 16-Feb-04
www.vishay.com
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