DG485 Datasheet, PDF (7/11 Pages) Vishay Siliconix – Octal Analog Switch Array

TIMING DIAGRAMS
CLOCK
DATA
50%
50%
t_DH
t_DS
FIGURE 4. Data Setup and Hold Time
DG485
Vishay Siliconix
CLOCK
RS
LOAD
t_LH
t_RH
FIGURE 5. Timing Relationships
RS
D_IN
CLK
LD
S₁
S₂
S₃
S₄
S₅
S₆
S₇
S₈
D_OUT
S₁ – S₈ and D_OUT are expected output with the drain connected high. The sources require pull-down of 1 kW.
FIGURE 6.
t_DRC
Document Number: 70065
S-52433—Rev. E, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
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