DG485 Datasheet, PDF (10/11 Pages) Vishay Siliconix – Octal Analog Switch Array

DG485
Vishay Siliconix
APPLICATIONS
CLK
LD
t_LOGIC
f
t_LOGIC
DG485
IN₁ R_IN
IN_{2 RIN}
C₁
C₂
R₁
R₂
–
+
f= for CLK and LD inputs of the same frequency.
The recommended phase delay of LD from CLK is
½ t_LOGIC to t_LOGIC:
t_LOGIC(MIN): 80 ns at 25_C
150 ns at 125_C
V+ = 15 V
V– = –15 V
GND = 0 V
FIGURE 11.
V_REF
D_IN
DG485
CLK
R₀
R₁
R₂
R_F
R₇
–
+
V_OUT
FIGURE 12. Multi-Function Circuit Provides Input Selection,
Gain Ranging and Filtering with One DG485
FIGURE 13. Serial DAC Circuit
www.vishay.com S FaxBack 408-970-5600
5-10
Document Number: 70065
S-52433—Rev. E, 06-Sep-99