SI8415DB Datasheet, PDF (6/6 Pages) Vishay Siliconix – P-Channel 12-V (D-S) MOSFET

Si8415DB
Vishay Siliconix
New Product
PACKAGE OUTLINE
MICRO FOOT: 4-BUMP (2 X 2, 0.8-mm PITCH)
4 O 0.30 X 0.31
Note 3
Solder Mask O X 0.40
e
e
Recommended Land
A₂
A
A₁
b Diamerter
Silicon
Bump Note 2
S
8415
XXX
Mark on Backside of Die
E
e
e
S
D
NOTES (Unless Otherwise Specified):
1. Laser mark on the silicon die back, coated with a thin metal.
2. Bumps are Eutectic solder 63/57 Sn/Pb.
3. Non-solder mask defined copper landing pad.
4. The flat side of wafers is oriented at the bottom.
Dim
A
A₁
A₂
b
D
E
e
S
MILLIMETERS*
Min
Max
0.600
0.650
0.260
0.290
0.340
0.360
0.370
0.410
1.520
1.600
1.520
1.600
0.750
0.850
0.370
0.380
INCHES
Min
Max
0.0236
0.0256
0.0102
0.0114
0.0134
0.0142
0.0146
0.0161
0.0598
0.0630
0.0598
0.0630
0.0295
0.0335
0.0146
0.0150
* Use millimeters as the primary measurement.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?73210.
www.vishay.com
6
Document Number: 73210
S-50037—Rev. A, 17-Jan-05