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DG538A Datasheet, PDF (5/16 Pages) Vishay Siliconix – 4-/8-Channel Wideband Video Multiplexers
DG534A/538A
Vishay Siliconix
SPECIFICATIONSa
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 15 V, V– = –3 V, VL = 5 V
WR = 0.8 V, RS, EN= 2 V
Tempb
Typc
A Suffix
–55 to 125_C
D Suffix
–40 to 85_C
Mind Maxd Mind Maxd
Dynamic Characteristics (Cont’d)
Chip Disabled Crosstalkf
Adjacent Input Crosstalkf
All Hostile Crosstalk
Differential Crosstalk
Bandwidth
XTALK(CD)
RL = 75 W , f = 5 MHz
PLCC Room
–75
EN = 0.8 V
See Figure 8
DIP
Room
–65
XTALK(AI)
RIN = 10 W
RL = 10 kW
f = 5 MHz
SeeFigure 9
PLCC Room
–97
DIP
Room
–87
RIN = 75 W , RL = 75 W
PLCC Room
–80
f = 5 MHz
See Figure 7
DIP
Room
–70
XTALK(AH)
RIN = 10 W
RL = 10 kW
f = 5 MHz
See Figure 7
PLCC Room
–77
DIP
Room
–72
RIN = 75 W , RL = 75 W
PLCC Room
–77
f = 5 MHz
See Figure 7
DIP
Room
–72
XTALK(DIFF)
RIN = 10 W , RL = 10 kW
f = 5 MHz, See Figure 10
RIN = RL = 75 W
f = 5 MHz, See Figure 10
Room
–84
Room
–84
BW
RL = 50 W , See Figure 6
Room
500
Power Supplies
Positive Supply Current
Negative Supply Current
Functional Check of
Maximum Operating
Supply Voltage Range
Logic Supply Current
I+
Room
0.6
Any One Channel Selected with Ad-
Full
2
5
2
5
I–
dress Inputs at GND or 5 V
Room
0.6
–1.8
Full
–2
–1.8
–2
V+ to V–
Full
10
21
10
21
V– to GND
Functional Test Only
Full
–5.5
0
–5.5
0
V+ to GND
Full
10
21
10
21
IL
Full
150
500
500
Timing
Reset to Write
WR, RS
Minimum Pulse Width
A0, A1, EN
Data Valid to Strobe
A0, A1, EN
Data Valid after Strobe
Address Bus Tri-Statee
Address Bus Output
Address Bus Input
tRW
tMPW
tDW
tWD
tAZ
tAO
tAI
See Figure 1
Room
–22
Full
50
50
Room
60
Full
200
200
Room
20
Full
100
100
Room
–20
Full
50
50
Room
25
Room
95
Room
110
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Defined by system bus requirements.
f. Each individual pin shown as GND must be grounded.
g. Guaranteed by design, not subject to production test.
Unit
dB
MHz
mA
V
mA
ns
Document Number: 70069
S-05734—Rev. G, 29-Jan-02
www.vishay.com
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