DG221B Datasheet, PDF (5/6 Pages) Vishay Siliconix – Quad SPST CMOS Analog Switch with Latches

TEST CIRCUITS
R_g
V_g
3V
+15 V
V+
S
D
IN
WR
V–
–15 V
New Product
DG221B
Vishay Siliconix
V_O
C_L
1000 pF
V_O
IN_X OFF
DV_O
ON
OFF
DV_O = measured voltage error due to charge injection
The charge injection in coulombs is Q = C_L x DV_O
FIGURE 5. Charge Injection
+15 V
C
V_S
R_g = 50 W
2.4 V
V+
S
D
V_O
IN
R_L
GND WR V–
C
–15 V
V_S
Off Isolation = 20 log
V_O
C = RF bypass
FIGURE 6. Off Isolation
+15 V
C
V_S
R_g = 50 W
0V
NC
0V
V+
S₁
D₁
IN₁
S₂
D₂
IN₂
GND WR V–
C
50 W
V_O
R_L
–15 V
V_S
X_TALK Isolation = 20 log
V_O
C = RF bypass
FIGURE 7. Channel-to-Channel Crosstalk
APPLICATION HINTS^a
V+
V–
Positive Supply Negative Supply
Voltage
Voltage
GND
WR
(V)
(V)
(V)
(V)
15
–15
0
2.4/0.8
10
–10
0
2.4/0.8
10
–5
0
2.4/0.8
Notes:
a. Application Hints are for DESIGN AID ONLY, not guaranteed and not subject to production testing.
Document Number: 71616
S-03627—Rev. A, 23-Apr-01
V_IN
Logic Input
Voltage
V_INH(min)/V_INL(max)
(V)
2.4/0.8
2.4/0.8
2.4/0.8
V_S or V_D
Analog Voltage
Range
(V)
–15 to 15
–10 to 10
–5 to 10
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