DG221B Datasheet, PDF (2/6 Pages) Vishay Siliconix – Quad SPST CMOS Analog Switch with Latches

DG221B
Vishay Siliconix
New Product
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to V–
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 V
GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
Digital Inputs^a, V_S, V_D . . . . . . . . . . . . . . . . . . . . . . . . . (V–) –2 V to (V+) +2 V
or 20 mA, whichever occurs first
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Peak Current, S or D (Pulsed 1 ms, 10% duty cycle) . . . . . . . . . . . . . . 70 mA
Storage Temperature:
(DJ and DY Suffix) . . . . . . . . . . . –65 to 125_C
Power Dissipation (Package)^b
16-Pin Plastic DIP^c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW
16-Pin SOIC^d . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mW
Notes:
a. Signals on S_X, D_X, or IN_X exceeding V+ or V– will be clamped by internal
diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6.5 mW/_C above 25_C
d. Derate 7.7 mW/_C above 75_C
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+
GND
IN_X
WR
V–
5V
Reg
–
+
V–
V+
–
+
Latch
Level
Shift/
Drive
FIGURE 1.
S
V–
V+
D
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Document Number: 71616
S-03627—Rev. A, 23-Apr-01