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SI4567DY Datasheet, PDF (3/12 Pages) Vaishali Semiconductor – Dual N- and P-Channel 40-V (D-S) MOSFET
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Si4567DY
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min. Typ.a Max. Unit
Dynamica
Turn-On Delay Time
Rise Time
td(on)
tr
N-Channel
VDD = 20 V, RL = 4 Ω
ID ≅ 1 A, VGEN = 10 V, Rg = 1 Ω
N-Ch
P-Ch
N-Ch
P-Ch
8
13
10
15
20
30
16
25
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
td(off)
tf
td(on)
tr
P-Channel
VDD = - 20 V, RL = 4 Ω
ID ≅ - 1 A, VGEN = - 10 V, Rg = 1 Ω
N-Channel
VDD = 20 V, RL = 4 Ω
ID ≅ 1 A, VGEN = 4.5 V, Rg = 1 Ω
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
23
35
19
30
27
42
10
15
ns
74
110
23
35
95
145
93
140
Turn-Off Delay Time
Fall Time
td(off)
tf
P-Channel
VDD = - 20 V, RL = 4 Ω
ID ≅ - 1 A, VGEN = - 4.5 V, Rg = 16 Ω
N-Ch
P-Ch
N-Ch
P-Ch
31
48
30
45
33
50
25
38
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode
Current
IS
Pulse Diode Forward Currenta
ISM
TC = 25 °C
N-Ch
P-Ch
N-Ch
P-Ch
2.3
- 2.5
A
20
- 20
Body Diode Voltage
VSD
IS = 1.5 A
IS = - 1.6 A
N-Ch
P-Ch
0.8
1.2
V
- 0.8 - 1.2
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
N-Channel
IF = 2 A, dI/dt = 100 A/µs, TJ = 25 °C
N-Ch
P-Ch
N-Ch
P-Ch
26
40
ns
26
40
26
40
nC
22
35
Reverse Recovery Fall Time
ta
P-Channel
N-Ch
IF = - 2 A, dI/dt = - 100 A/µs, TJ = 25 °C P-Ch
13
12
ns
Reverse Recovery Rise Time
tb
N-Ch
13
P-Ch
14
Notes:
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Document Number: 73426
S09-0393-Rev. C, 09-Mar-09
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