DG3157A Datasheet, PDF (3/7 Pages) Vishay Siliconix – Low Voltage, 300-MHz - 3 dB Bandwidth, SPDT Analog Switch with Power Down Protection (2:1 Multiplexer/Demultiplexer Bus Switch)

DG3157A, DG3157B
Vishay Siliconix
SPECIFICATIONS
Parameter
Power Supply
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 3.0 V, V_SL = 0.5 V, V_SH = 2.0 V^e
Temp.^a
Limits
- 40 °C to 85 °C
Min.^b Typ.^c Max.^b
Unit
Power Supply Range
V+
Full
1.65
5.5
V
Quiescent Supply Current
I+
V+ = 5.5 V, V_A = V+ or GND
Room
Full
1
10
µA
AC Electrical Characteristice
V+ = 1.65 to 1.95 V Full
1.5
Prop Delay Time^f
t_PHL/t_PLH
V_A = 0 V
V+ = 2.3 to 2.7 V
Full
V+ = 3.0 to 3.6 V
Full
0.8
0.4
V+ = 4.5 to 5.5 V
Full
0.3
Output Enable Time^f
Output Disable Time^f
V+ = 1.65 to 1.95 V
t_PZL/t_PZH
V_LOAD = 2 x V+ for t_PZL
V_LOAD = 0 V for t_PZH
V+ = 2.3 to 2.7 V
V+ = 3.0 to 3.6 V
V+ = 4.5 to 5.5 V
V+ = 1.65 to 1.95 V
t_PLZ/t_PHZ
V_LOAD = 2 x V+ for t_PLZ
V_LOAD = 0 V for t_PHZ
V+ = 2.3 to 2.7 V
V+ = 3.0 to 3.6 V
V+ = 4.5 to 5.5 V
Room
Full
Room
Full
Room
Full
Room
Full
Room
Full
Room
Full
Room
Full
Room
Full
27
50
15
45
10
30
7
25
ns
16
45
10
40
8
35
6
21
V+ = 1.65 to 1.95 V
Full
0.5
11
Break-Before-Make Time^d
t_BBM
V+ = 2.3 to 2.7 V
V+ = 3.0 to 3.65
Full
0.5
6
Full
0.5
4
V+ = 4.5 to 5.5 V
Full
0.5
3
Charge Injection^d
Off Isolation^d
Crosstalk^d
- 3 dB Bandwidth^d
Total Harmonic Distortion^d
Q
OIRR
X_TALK
BW
THD
C_L = 1 nF, V_GEN = 0 V
R_GEN = 0 Ω
V+ = 5 V
V+ = 3.3 V
R_L = 50 Ω, f = 10 MHz
R_L = 50 Ω
R_L = 600 Ω, 0.5 Vp-p f = 600 Hz - 20 kHz
Room
Room
Room
Room
Room
Room
7
5
- 57
- 64
300
0.016
pC
dB
MHz
%
Capacitance
Control Pin Capacitance^d
C_S
V+ = 0 V
Room
3.7
B Port Off Capacitance^d
A Port Capacitance When
Switch Enable^d
C_IO-B
C_IO-A(on)
V+ = 5 V
Room
7
pF
Room
19
Notes:
a. Room = 25 °C, Full = as determined by the operating suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for design aid only, not guaranteed nor subject to production testing.
d. Guarantee by design, nor subjected to production test.
e. V_S = input voltage to perform proper function.
f. Guaranteed by design and not production tested. The bus switch propagation delay is a function of the RC time constant contributed by the
on-resistance and the specified load capacitance with an ideal voltage source (zero output impedance) driving the switch.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Document Number: 68628
S-81944-Rev. C, 25-Aug-08
www.vishay.com
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