SI7100DN Datasheet, PDF (2/14 Pages) Vishay Siliconix – N-Channel 8-V (D-S) MOSFET

Si7100DN
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambient^{a, b}
Maximum Junction-to-Case (Drain)
t ≤ 10 s
Steady State
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. Maximum under Steady State conditions is 81 °C/W.
Symbol
R_thJA
R_thJC
Typical
24
1.9
Maximum
33
2.4
Unit
°C/W
SPECIFICATIONS T_J = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Static
Drain-Source Breakdown Voltage
V_DS
V_GS = 0 V, I_D = 250 µA
V_DS Temperature Coefficient
V_GS(th) Temperature Coefficient
ΔV_DS/T_J
ΔV_GS(th)/T_J
I_D = 250 µA
Gate-Source Threshold Voltage
V_GS(th)
V_DS = V_GS, I_D = 250 µA
Gate-Source Leakage
I_GSS
V_DS = 0 V, V_GS = ± 8 V
Zero Gate Voltage Drain Current
I_DSS
V_DS = 8 V, V_GS = 0 V
V_DS = 8 V, V_GS = 0 V, T_J = 55 °C
On-State Drain Current^a
I_D(on)
V_DS ≥ 5 V, V_GS = 4.5 V
Drain-Source On-State Resistance^a
R_DS(on)
V_GS = 4.5 V, I_D = 15 A
V_GS = 2.5 V, I_D = 10 A
Forward Transconductance^a
g_fs
V_DS = 5 V, I_D = 15 A
Dynamic^b
Input Capacitance
C_iss
Output Capacitance
C_oss
V_DS = 4 V, V_GS = 0 V, f = 1 MHz
Reverse Transfer Capacitance
C_rss
Total Gate Charge
Q_g
V_DS = 4 V, V_GS = 8 V, I_D = 10 A
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Q_gs
Q_gd
R_g
t_d(on)
t_r
t_d(off)
t_f
t_d(on)
t_r
t_d(off)
t_f
V_DS = 4 V, V_GS = 4.5 V, I_D = 10 A
f = 1 MHz
V_DD = 4 V, R_L = 0.8 Ω
I_D ≅ 5 A, V_GEN = 4.5 V, R_g = 1 Ω
V_DD = 4 V, R_L = 0.8 Ω
I_D ≅ 5 A, V_GEN = 8 V, R_g = 1 Ω
Min.
Typ.
Max.
Unit
8
V
12
- 3.5
mV/°C
0.4
1.0
V
± 100
nA
1
µA
10
30
A
0.0029 0.0035
Ω
0.0035 0.0045
120
S
3810
1625
pF
1205
69
105
40
60
nC
3.8
8.2
1.1
1.7
Ω
19
30
57
90
61
95
10
15
ns
14
25
52
80
53
80
8
15
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Document Number: 73785
S-80581-Rev. C, 17-Mar-08