PRM48BF480T400B00 Datasheet, PDF (20/22 Pages) Vicor Corporation – High Efficiency Remote Sense PRM Converter

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_m 100
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

^ln
_kd2
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[4]
9.3 Burst
Operation:
Mode
At light loads, the PRM will operate in a burst mode due
to minimum timing constraints. An example burst
operation waveform is illustrated in Figure 29.
For very light loads, and also for higher input voltages,
the minimum time power switching cycle from the
powertrain will exceed the power required by the load. In
this case the external error amplifier will periodically
drive PR below the switching threshold in order to
maintain regulation. Switching will cease momentarily
until the error amplifier once again drives PR voltage
above the threshold.
Figure 29 – light load burst mode of operation
Note that during the bursts of switching, the powertrain
frequency is constant, but the number of pulses as well
as the time between bursts is variable. The variability
depends on many factors including input voltage, output
voltages, load impedance, and external error amplifier
output impedance.
In burst mode, the gain of the PR input to the plant which
is modeled in the previous sections is time varying.
Therefore the small signal analysis can not be directly
applied to burst mode operation.
9.4 Input and Output filter design
Figures 14 and 15 provide the total input and output
charge per cycle, as well as switching frequency, of the
PRM at full load under various input and output voltages
conditions.
PRM® Regulator
Rev 1.1
PRM48BF480T400B00
Figure 20 provides the effective internal capacitance of
the module. A conservative estimate of input and output
peak-peak voltage ripple at nominal line and trim is
provided by equation [5]:
I ⋅ 0.4
ΔV = ^{QTO T ­ FLfSW}
[5]
C_INT + C_EXT
Q_TOT is the total input (Fig. 15) or output (Fig. 14) charge
per switching cycle at full load, while C_INT is the module
internal effective capacitance at the considered voltage
(Fig. 20) and C_EXT is the external effective capacitance at
the considered voltage.
9.5 Input filter stability
The PRM can provide very high dynamic transients. It is
therefore very important to verify that the voltage supply
source as well as the interconnecting line are stable and
do not oscillate. For this purpose, the converter dynamic
input impedance magnitude r_{EQ _ IN} is provided in
Figures 22, 23, 24. It is recommended to provide
adequate design margin with respect to the stability
conditions illustrated in 10.5.1 and 10.5.2 .
9.5.1 Inductive source and local, external input
decoupling capacitance with negligible ESR (i.e.:
ceramic type)
The voltage source impedance can be modeled as a
series R_lineL_line circuit. The high performance ceramic
decoupling capacitors will not significantly damp the
network because of their low ESR; therefore in order to
guarantee stability the following conditions must be
verified:
R_line > _(C
L_line
+C
)⋅ r
[6]
IN INT
IN EXT
EQ IN
R_line << r_{EQ _ IN}
[7]
It is critical that the line source impedance be at least an
octave lower than the converter’s dynamic input
resistance, [7]. However, R_line cannot be made arbitrarily
low otherwise equation [6] is violated and the system will
show instability, due to under-damped RLC input
network.
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