VCC4_10 Datasheet, PDF (3/9 Pages) Vectron International, Inc – 1.8, 2.5, 3.3, 5.0 volt CMOS Oscillator

VCC4 Data sheet
Table 2. Electrical Performance, 3.3V option
Parameter
Symbol
Frequency
f_O
Operating Supply Voltage ¹
V_DD
Absolute Maximum Operating Voltage
Supply Current, Output Enabled
I_DD
< 1.500 MHz
1.5 to 20 MHz
20.01 to 50 MHz
50.01 to 75 MHz
75.01 to 100 MHz
100.01 to 125 MHz
Supply Current, Output disabled
I_DD
Output Logic Levels
Output Logic High²
V_OH
Output Logic Low²
V_OL
Output Logic High Drive
I_OH
Output Logic Low Drive
I_OL
Output Rise/Fall Time²
t_R/t_F
< 20.00 MHz
20.01 to 50.00 MHz
50.01 to 125.00 MHz
Duty Cycle³ (ordering option)
SYM
Operating temperature (ordering option)
Stability⁴ (ordering option)
RMS Jitter, 12kHz to 20 MHz
Period Jitter
RMS
Peak to Peak
Output Enable/Disable⁵
Output Enabled
Output Disabled
Internal Enable Pull-Up resistor⁵
Start-up time
Min
1.544
2.97
-0.5
Typical
3.3
Maximum
125.000
3.63
5.0
5
7
20
30
40
46
30
0.9*V_DD
8
8
0.1*V_DD
10
6
3
45/55
-10/70 or –40/85
±25, ±50, ±100
0.5
1
3.0
21
2.0
0.5
100
8
Units
MHz
V
V
mA
uA
V
V
mA
mA
ns
%
°C
ppm
ps
ps
V
Kohm
ms
1. A 0.01uF and a 0.1uF capacitor should be located as close to the supply as possible (to ground) is recommended.
2. Figure 3 defines these parameters. Figure 4 illustrates the operating conditions under which these parameters are tested and
specified. For Fo>90MHz, rise and fall time is measured 20 to 80%.
3. Symmetry is measured defined as On Time/Period.
4. Includes calibration tolerance, operating temperature, supply voltage variations, and shock and vibration (not under operation). 50
and 100ppm options include aging.
5. Output will be enabled if enable/disable is left open.
V_OH
50%
V_OL
t_R
t_F
On Time
Period
Figure 3. Output Waveform
IDD
+
VDD -
.1μF
.01μF
4
1
IC
VC ⁺
-
2³
15pF
Figure 4. Typical Output Test Conditions (25±5°C)
Vectron International 267 Lowell Rd, Hudson NH 03051 Tel: 1-88-VECTRON-1 e-mail: [e-mail]