UR5595 Datasheet, PDF (6/12 Pages) Unisonic Technologies – DDR TERMINATION REGULATOR

UR5595
MOS IC
„ CAPACITOR SELECTION
A capacitor is recommended for improve input stability performance during large load transients to prevent the
input power rail from dropping, especially for PV_IN. The input capacitor should be located as close as possible to the
PV_IN pin. A typical recommended value for AL electrolytic capacitors is 50μF and 10μF with X5R for Ceramic
capacitors. If AV_IN and PV_IN are separated, the 47μF capacitor should be placed as close to possible to the PV_IN rail.
An additional 0.1uF ceramic capacitor can be placed on the AVIN rail to prevent excessive noise from coupling into
the device.
UTC UR5595 has been designed to be insensitive of output capacitor size or ESR (Equivalent Series Resistance).
The choice for output capacitor depends on the application and the requirements for load transient response of V_TT.
As a general recommendation the output capacitor should be sized above 100μF with a low ESR for SSTL
applications with DDR-SDRAM. The value of ESR should be determined by the maximum current spikes expected
and the extent at which the output voltage is allowed to droop.
„ THERMAL DISSIPATION
The UR5595 will generate heat result from internal power dissipation when current flow working. The device might
be damaged any beyond maximum junction temperature rating. The maximum allowable internal temperature rise
(T_Rmax) can be calculated given the maximum ambient temperature (T_Amax) of the application and the maximum
allowable junction temperature (T_Jmax).
T_Rmax = T_Jmax − T_Amax
From this equation, the maximum power dissipation (P_Dmax) of the part can be calculated:
P_Dmax = T_Rmax / θ_JA
The θ_JA of UR5595 can be calculated (refer to JEDEC standard) and will depend on several package type,
materials, ambient air temperature and so on.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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QW-R502-062,A