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IRF840 Datasheet, PDF (2/3 Pages) Motorola, Inc – N-CHANNEL ENHANCEMENT-MODE SILICON GATE TMOS POWER FIELD EFFECT TRANSISTOR
ELECTRICAL CHARACTERISTICS (Ta=25℃ unless otherwise specified)
Parameter
Symbol
Test conditions
Min
Drain-source breakdown voltage
Gate-threshold voltage
Gate-body leakage
Zero gate voltage drain current
Drain-source on-resistance
Forward transconductance
Diode forward voltage
Total gate charge
Gate-source charge
Gate-drain charge
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on time
Rise time
Turn-off time
V(BR)DSS VGS=0V,ID=250µA
500
Vth(GS) VDS=VGS, ID=250µA
2
lGSS
VDS=0V, VGS=±20V
IDSS
VDS=500V, VGS=0V
RDS(0n) VGS=10V, ID=4.8A
gfs
VDS=50V, ID=4.8A
4.9
VSD
IS=8A, VGS=0V
Qg
Qgs
VDS=400V, VGS=10V,ID=8A
Qgd
Ciss
Coss VDS=25V, VGS=0V,f=1MHz
Crss
td(0n)
tr
td(off)
VDD=250V,RD=31Ω,
ID=8A, RG=9.1Ω
Fall time
tf
Notes:
1.Repetitive Rating ; Pulse width limited by maximum junction temperature
2.L=14mH, IAS =8.0A, VDD=50V, RG=25Ω, starting TJ = 25℃
3.ISD≤8.0A, di/dt≤100A/µs, VDD≤V(BR)DSS, TJ≤150℃
4. Pulse width ≤300µs, Duty cycle≤2%
Product specification
Typ Max Unit
V
4
±100 nA
25
µA
0.85
Ω
S
2
V
63
9.3
nC
32
1300
310
pF
120
14
23
ns
49
20
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