TS3300 Datasheet, PDF (4/14 Pages) Touchstone Semiconductor Inc – 0.6-4.5VIN, 1.8-5.25VOUT, 3.5-uA, Low Input Voltage, High-Efficiency Boost + LDO

TS3300
ELECTRICAL CHARACTERISTICS
VREGIN = VBO = 3V, VREGOUT = 1.8V, V_{REG EN} = HIGH, IREGOUT = 20mA, CREGOUT = 10µF unless otherwise noted. Values are at TA = 25°C unless
otherwise noted. See Note 1.
PARAMETER
SYMBOL CONDITIONS
LINEAR REGULATOR
MIN
TYP
MAX
UNITS
2.3V ≤ VREGIN ≤ 5V
2.5
%
DC Output Accuracy
VREGOUT
0mA ≤ IREGOUT ≤ 20mA
VREG FB = 505mV
-40ºC ≤ TA ≤ 85ºC
-3.5
3.5
%
Input Voltage Range
Output Voltage Range
Input Supply Current
Line Regulation
Load Regulation
Drop Out Voltage
VREGIN
VREGOUT
IREGIN
ΔVREGOUT/
ΔVREGIN
ΔVREGOUT/
ΔIREGOUT
VDO
Guaranteed by design
IREGOUT = 0mA, VREG EN = VREGIN
VREGOUT +0.5V ≤ VREGIN ≤ 5V
10mA ≤ IREGOUT ≤ 20mA
0mA ≤ IREGOUT ≤ 20mA
1.8
5.25
V
1.8
5
V
0.4
1
µA
-1
1
%
-1
1
%
-1.5
1.5
%
40
mV
Output Current Limit
ICL
150
mA
Power Supply Rejection
Ratio
PSRR
CREGOUT = 22µF
IREGOUT = 100mA
f = 10Hz
f = 100Hz
f = 1kHz
-70
dB
-50
dB
-36
dB
Startup Time
Linear Regulator Enable
Voltage
Linear Regulator Enable
Hysteresis
tSTR
VREG EN
VREG EN_HYST
VIL (CMOS logic)
VIH (CMOS logic)
0.8 xVREGIN
1
ms
0.2 x VREGIN
V
V
100
mV
Enable Pin Current
SWITCH RdsON
IREG EN
RSW
VSW EN = HIGH. Measured from REGIN to
REGOUT
10
nA
0.9
1.2
Ω
SWITCH Enable Voltage
VSW EN
VIL (CMOS logic)
VIH (CMOS logic)
0.8 xVREGIN
0.2 x VREGIN
V
V
Regulator Feedback Pin
Current
IREG FB
±0.1
±1
nA
Note 1: All devices are 100% production tested at TA = +25°C and are guaranteed by characterization for TA = TMIN to TMAX, as specified.
Page 4
TS3300DS r1p0
RTFDS