TMP88FW45FG Datasheet, PDF (91/276 Pages) Toshiba Semiconductor – 8 Bit Microcontroller

TMP88FW45FG
Example :Duty measurement (resolution fc/2⁷ [Hz], CGCR<DV1CK> = “0”)
CLR
(INTTC1SW). 0
; INTTC1 service switch initial setting
Address set to convert INTTC1SW at each INTTC1
LD
(TC1CR), 00000110B
; Sets the TC1 mode and source clock
DI
; IMF= “0”
SET
(EIRD). 2
EI
; Enables INTTC1
; IMF= “1”
LD
(TC1CR), 00100110B
; Starts TC1 with an external trigger at MCAP1 = 0
:
PINTTC1:
CPL
(INTTC1SW). 0
; INTTC1 interrupt, inverts and tests INTTC1 service switch
JRS
F, SINTTC1
LD
A, (TC1DRBL)
; Reads TC1DRB (High-level pulse width)
LD
W,(TC1DRBH)
LD
(HPULSE), WA
; Stores high-level pulse width in RAM
RETI
SINTTC1:
LD
A, (TC1DRBL)
; Reads TC1DRB (Cycle)
LD
W,(TC1DRBH)
LD
(WIDTH), WA
; Stores cycle in RAM
:
RETI
; Duty calculation
:
VINTTC1:
DW
PINTTC1
; INTTC1 Interrupt vector
TC1 pin
INTTC1 interrupt request
INTTC1SW
HPULSE
WIDTH
Page 79