TC51WHM516AXGN65 Datasheet, PDF (8/11 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS, 2,097,152-WORD BY 16-BIT CMOS PSEUDO STATIC RAM

Deep Power-down Timing
CE1
CE2
Power-on Timing
V_DD
t_CS
V_DD min
TC51WHM516AXGN65,70
t_DPD
t_CH
CE1
t_CHC
CE2
t_CH
t_CHP
Provisions of Address Skew
Read
If multiple invalid address cycles shorter than tRCmin sustain over 10µs, as least one valid address cycle over
tRCmin must be needed during 10µs.
over 10µs
CE1
WE
Address
t_RCmin
Write
If multiple invalid address cycles shorter than tWCmin sustain over 10µs, as least one valid address cycle over
tWCmin with tWPmin must be needed during 10µs.
over 10µs
CE1
t_WPmin
WE
Address
t_WCmin
2002-03-14 8/11