TC51WHM516AXGN65 Datasheet, PDF (4/11 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS, 2,097,152-WORD BY 16-BIT CMOS PSEUDO STATIC RAM

TC51WHM516AXGN65,70
AC CHARACTERISTICS AND OPERATING CONDITIONS
(Ta = −25°C to 85°C, V_DD = 2.6 to 3.3 V) (See Note 5 to 11)
SYMBOL
PARAMETER
t_RC
t_ACC
t_CO
t_OE
t_BA
t_COE
t_OEE
t_BE
t_OD
t_ODO
t_BD
t_OH
t_PM
t_PC
t_AA
t_AOH
t_WC
t_WP
t_CW
t_BW
t_AS
t_WR
t_ODW
t_OEW
t_DS
t_DH
t_CS
t_CH
t_DPD
t_CHC
t_CHP
Read Cycle Time
Address Access Time
Chip Enable ( CE1 ) Access Time
Output Enable Access Time
Data Byte Control Access Time
Chip Enable Low to Output Active
Output Enable Low to Output Active
Data Byte Control Low to Output Active
Chip Enable High to Output High-Z
Output Enable High to Output High-Z
Data Byte Control High to Output High-Z
Output Data Hold Time
Page Mode Time
Page Mode Cycle Time
Page Mode Address Access Time
Page Mode Output Data Hold Time
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Data Byte Control to End of Write
Address Set-up Time
Write Recovery Time
WE Low to Output High-Z
WE High to Output Active
Data Set-up Time
Data Hold Time
CE2 Set-up Time
CE2 Hold Time
CE2 Pulse Width
CE2 Hold from CE1
CE2 Hold from Power On
TC51WHM516AXGN
65
70
MIN
MAX
MIN
MAX
65
10000
70
10000

65

70

65

70

25

25

25

25
10

10

0

0

0

0


20

20

20

20

20

20
10

10

65
10000
70
10000
30

30


30

30
10

10

65
10000
70
10000
50

50

60

60

60

60

0

0

0

0


20

20
0

0

30

30

0

0

0

0

300

300

10

10

0

0

30

30

UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ms
ns
µs
AC TEST CONDITIONS
PARAMETER
Output load
Input pulse level
Timing measurements
Reference level
t_R, t_F
CONDITION
30 pF + 1 TTL Gate
V_DD − 0.2 V, 0.2 V
V_DD × 0.5
V_DD× 0.5
5 ns
2002-03-14 4/11