TLP250H Datasheet, PDF (7/16 Pages) Toshiba Semiconductor – Buffer logic type (totem pole output)

TLP250H,TLP250HF
12. Switching Characteristics (Note)(Unless otherwise specified, T_a = -40 to 125 )
Characteristics
Symbol
Note
Test
Circuit
Test Condition
Min Typ. Max Unit
Propagation delay time
(L/H)
t_pLH
(Note 1) Fig. I_F = 0 → 10 mA, V_CC = 30 V,
12.1.7 R_g = 20 Ω, C_g = 10 nF
100

500
ns
Propagation delay time
(H/L)
t_pHL
(Note 1)
I_F = 10 → 0 mA, V_CC = 30 V,
R_g = 20 Ω, C_g = 10 nF
100

500
Pulse width distortion
|t_pHL-t_pLH| (Note 1)
Propagation delay skew
(device to device)
Rise time
t_psk
(Note 1),
(Note 4)
t_r
(Note 1)
Fall time
t_f
(Note 1)
I_F = 0 ←→ 10 mA, V_CC = 30 V,


50
R_g = 20 Ω, C_g = 10 nF
I_F = 0 ←→ 10 mA, V_CC = 30 V, -150

150
R_g = 20 Ω, C_g = 10 nF
I_F = 0 → 10 mA, V_CC = 30 V,
R_g = 20 Ω, C_g = 10 nF

50

I_F = 10 → 0 mA, V_CC = 30 V,
R_g = 20 Ω, C_g = 10 nF

50

Common-mode transient
immunity at output high
CM_H
(Note 2)
Fig.
12.1.8
V_CM = 1000 V_p-p, I_F = 10 mA,
V_CC = 30 V, T_a = 25 ,
V_O(min) = 26 V
±40

 kV/µs
Common-mode transient
immunity at output low
CM_L
(Note 3)
V_CM = 1000 V_p-p, I_F = 0 mA,
V_CC = 30 V, T_a = 25 ,
V_O(max) = 1 V
±40


Note: All typical values are at T_a = 25 .
Note 1: Input signal (f = 250 kHz, duty = 50 %, t_r = t_f = 5 ns or less).
C_L is approximately 15 pF which includes probe and stray wiring capacitance.
Note 2: CM_H is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage
in the logic high state (V_O > 26 V).
Note 3: CM_L is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in
the logic low state (V_O < 1 V).
Note 4: The propagation delay skew, t_psk, is equal to the magnitude of the worst-case difference in t_pHL and/or t_pLH
that will be seen between units at the same given conditions (supply voltage, input current, temperature, etc).
©2015 Toshiba Corporation
7
2015-12-24
Rev.4.0