TLP250H Datasheet, PDF (4/16 Pages) Toshiba Semiconductor – Buffer logic type (totem pole output)

TLP250H,TLP250HF
8. Absolute Maximum Ratings (Note) (Unless otherwise specified, T_a = 25 )
Characteristics
Symbol Note
Rating
Unit
LED Input forward current
Input forward current derating
(T_a ≥ 110 )
I_F
∆I_F/∆T_a
20
-0.54
mA
mA/
Peak transient input forward current
I_FPT (Note 1)
1
A
Peak transient input forward current
derating
(T_a ≥ 110 )
∆I_FPT/∆T_a
-25
mA/
Input reverse voltage
Input power dissipation
V_R
6
V
P_D
40
mW
Input power dissipation derating
(T_a ≥ 110 )
∆P_D/∆T_a
-1.0
mW/
Detector Peak high-level output current
Peak low-level output current
(T_a = -40 to 125 )
I_OPH (Note 2)
-2.5
A
(T_a = -40 to 125 )
I_OPL (Note 2)
+2.5
Output voltage
V_O
35
V
Supply voltage
Output power dissipation
V_CC
35
P_O
260
mW
Output power dissipation derating
(T_a ≥ 110 )
∆P_O/∆T_a
-2.0
mW/
Common Operating temperature
Storage temperature
T_opr
-40 to 125

T_stg
-55 to 150
Lead soldering temperature
(10 s)
T_sol
(Note 3)
260
Isolation voltage
AC, 60 s, R.H. ≤ 60 %
BV_S (Note 4)
3750
Vrms
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Pulse width (PW) ≤ 1 µs, 300 pps
Note 2: Exponential waveform. Pulse width ≤ 0.2 µs, f ≤ 15 kHz, V_CC = 20 V, T_a = -40 to 125 
Exponential waveform. Pulse width ≤ 0.08 µs, f ≤ 25 kHz, V_CC = 15V, T_a = -40 to 125 
Note 3: ≥ 2 mm below seating plane.
Note 4: This device is considered as a two-terminal device: Pins 1, 2, 3 and 4 are shorted together, and pins 5, 6, 7
and 8 are shorted together.
©2015 Toshiba Corporation
4
2015-12-24
Rev.4.0