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THNCF008MBA Datasheet, PDF (6/48 Pages) Toshiba Semiconductor – The THNCFxxxMBA/BAI series CompactFlash card is a flash technology based with ATA interface flash memory card.
Signal Description
Signal Name
A10 to A0
(PC Card Memory Mode)
A10 to A0
(PC Card I/O Mode)
A2 to A0
(True IDE Mode)
BVD1
(PC Card Memory Mode)
−STSCHG
(PC Card I/O Mode)
−PDIAG
(True IDE Mode)
BVD2
(PC Card Memory Mode)
−SPKR
(PC Card I/O Mode)
−DASP
(True IDE Mode)
−CD1, −CD2
(PC Card Memory Mode)
−CD1, −CD2
(PC Card I/O Mode)
−CD1, −CD2
(True IDE Mode)
−CE1, −CE2
(PC Card Memory Mode)
−CE1, −CE2
(PC Card I/O Mode)
−CS0, −CS1
(True IDE Mode)
−CSEL
(PC Card Memory Mode)
−CSEL
(PC Card I/O Mode)
−CSEL
(True IDE Mode)
D15 to D00
(PC Card Memory Mode)
D15 to D00
(PC Card I/O Mode)
D15 to D00
(True IDE Mode)
Preliminary
THNCFxxxMBA/BAI Series
Dir
Pin No.
Description
These address lines along with the-REG signal are used to select
8,10,11,12,1 the following: The I/O port address registers within the
4,15,16,17,1 CompactFlash Storage Card, the memory mapped port address
8,19,20 registers within the CompactFlash Storage Card, a byte in the
I
card’s information structure and its configuration control and status
registers.
18,19,20
In True IDE Mode only A [2 : 0] are used to select the one of eight
registers in the Task File, the remaining address lines should be
grounded by the host.
This signal is asserted high as BVD1 is not supported
This signal is asserted low to alert the host to changes in the
I/O
46
RDY/−BSY and Write Protect states; while the I/O interface is
configured .Its use is controlled by the Card Config and Status
Register.
In the True IDE Mode, this input/output is the Pass Diagnostic
signal in the Master/Slave handshake protocol
This signal is asserted high, as BVD2 is not supported.
This line is the Binary Audio output from the card .If the Card does
I/O
45
not support the Binary Audio function, this line should be held
negated.
In the True IDE Mode, this input/output is the Disk Active/Slave
Present signal in the Master/Slave handshake protocol.
These Card Detect pins are connected to ground on the
O
26,25
CompactFlash Storage Card. They are used by the host to
determine that the CompactFlash Storage Card is fully inserted into
its socket.
These input signals are used both to select the card and to indicate
to the card whether a byte or a word operation is being
performed. −CE2 always accesses the odd byte of the word. −CE1
accesses the even byte or the Odd byte of the word depending on
A0 and −CE2.A multiplexing scheme based on A0, −CE1, −CE2
I
7,32
allows 8 bit hosts to access all data on D0~D7.
See Access specification below.
In the True IDE Mode CS0 is the chip select for the task file
registers while CS1 is used to select the Alternate Status Register
and the Device Control Register.
This signal is not used for this mode.
I
39
This internally pulled up signal is used to configure this device as a
Master or a Slave when configured in the True IDE Mode.
When this pin is grounded, this device is configured as a Master.
When the pin is open, this device is configured as a Slave.
These lines carry the Data, Commands and Status information
31,30,29,28, between the host and the controller. D00 is the LSB of the Even
27,49,48,47, Byte of the Word.D08 is the LSB of the Odd Byte of the Word.
I/O
6,5,4,3,2,
23,22,21 True IDE Mode, all Task File operations occur in byte mode on the
low order bus D00 to D07 while all data transfers are 16 bit using
D00 to D15.
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